Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86381?usp=email )
Change subject: mb/google/rauru: Notify EC that AP is in S0 ......................................................................
mb/google/rauru: Notify EC that AP is in S0
GPIO_AP_SUSPEND_L is supposed to be high in S0, and low in S3. EC uses this pin to determine the AP power state. This pin should be set as early as possible in bootblock.
BRANCH=rauru TEST=Build pass, reboot pass, suspend/resume pass. BUG=b:395737458
Signed-off-by: Wenzhen Yu wenzhen.yu@mediatek.com Change-Id: I6ea56208256bb6f11fb6b0adf7627403963295bc Reviewed-on: https://review.coreboot.org/c/coreboot/+/86381 Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yidi Lin yidilin@google.com --- M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/gpio.h 2 files changed, 2 insertions(+), 0 deletions(-)
Approvals: Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/rauru/chromeos.c b/src/mainboard/google/rauru/chromeos.c index b7844b7..5196fbe 100644 --- a/src/mainboard/google/rauru/chromeos.c +++ b/src/mainboard/google/rauru/chromeos.c @@ -19,6 +19,7 @@ gpio_output(GPIO_EN_SPKR, 0); gpio_output(GPIO_FP_RST_1V8_S3_L, 0); gpio_output(GPIO_XHCI_INIT_DONE, 0); + gpio_output(GPIO_AP_SUSPEND_L, 1); }
void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/rauru/gpio.h b/src/mainboard/google/rauru/gpio.h index fd15463..bdbfc2b 100644 --- a/src/mainboard/google/rauru/gpio.h +++ b/src/mainboard/google/rauru/gpio.h @@ -14,6 +14,7 @@ #define GPIO_AP_EC_WARM_RST_REQ GPIO(EINT29) #define GPIO_FP_RST_1V8_S3_L GPIO(EINT26) #define GPIO_AP_FP_FW_UP_STRAP GPIO(EINT27) +#define GPIO_AP_SUSPEND_L GPIO(EINT38) #define GPIO_EN_PWR_FP GPIO(PERIPHERAL_EN3) #define GPIO_BL_PWM_1V8 GPIO(DISP_PWM)