Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik.
Sowmya Aralguppe has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87089?usp=email )
Change subject: soc/intel/pantherlake: Allow board-specific SOC memory config override
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Patch Set 1:
(1 comment)
File src/mainboard/google/fatcat/romstage.c:
https://review.coreboot.org/c/coreboot/+/87089/comment/740d1e69_46d64ef5?usp... :
PS1, Line 42: /* default implementation does nothing */
NIT:A printf calling out that its weak function would be helpful ?
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