[S] Change in coreboot[master]: soc/intel/alderlake/iomap: Fix the PCR BAR size on ADL-S

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69948 )

Change subject: soc/intel/alderlake/iomap: Fix the PCR BAR size on ADL-S
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soc/intel/alderlake/iomap: Fix the PCR BAR size on ADL-S

According to ADL PCH BIOS specification (DOC# 630603) ADL-S PCH
uses a fixed SBREG_BAR of 256MiB starting at 0xe0000000.

Signed-off-by: Michał Żygowski 
Change-Id: Ied59a6dad8fb065dc3aeb6281bd32074aaa5e3b8
---
M src/soc/intel/alderlake/include/soc/iomap.h
1 file changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/69948/1

diff --git a/src/soc/intel/alderlake/include/soc/iomap.h b/src/soc/intel/alderlake/include/soc/iomap.h
index 94fb5be..59019d4 100644
--- a/src/soc/intel/alderlake/include/soc/iomap.h
+++ b/src/soc/intel/alderlake/include/soc/iomap.h
@@ -100,6 +100,10 @@
 #define TCO_BASE_SIZE		0x20

#define P2SB_BAR		CONFIG_PCR_BASE_ADDRESS
+#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S)
+#define P2SB_SIZE		(256 * MiB)
+#else
 #define P2SB_SIZE		(16 * MiB)
+#endif

#endif