Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/29074
Change subject: soc/amd/stoneyridge: Remove hudson EHCI debug controllers ......................................................................
soc/amd/stoneyridge: Remove hudson EHCI debug controllers
Remove nonpreset controllers from the PCI device identifier function (ignoring any CONFIG_USBDEBUG_HCD_INDEX). The extra devices appear to be holdovers from the original sb/hudson source.
TEST=Jam Makefile.inc to unconditionally build enable_usbdebug.c and verify proper BDF is returned in romstage and ramstage.
Change-Id: I2e819d5e998922ad427c4a094c29a590f249a0d3 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/stoneyridge/enable_usbdebug.c 1 file changed, 2 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/29074/1
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c index 5220457..0a0c3ec 100644 --- a/src/soc/amd/stoneyridge/enable_usbdebug.c +++ b/src/soc/amd/stoneyridge/enable_usbdebug.c @@ -20,6 +20,7 @@ #include <arch/io.h> #include <device/pci_ehci.h> #include <device/pci_def.h> +#include <soc/pci_devs.h> #include <soc/southbridge.h>
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) @@ -28,12 +29,7 @@ outb(0xef, PM_INDEX); outb(0x7f, PM_DATA);
- if (hcd_idx == 3) - return PCI_DEV(0, 0x16, 0); - else if (hcd_idx == 2) - return PCI_DEV(0, 0x13, 0); - else - return PCI_DEV(0, 0x12, 0); + return SOC_EHCI1_DEV; }
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)