Change in coreboot[master]: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B - coreboot-gerrit

10 Nov 2021


      Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59006 )
Change subject: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B
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Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59006/comment/1d2e25ca_18f77a11 
PS2, Line 10: copied to CSE_RW, so the sizes of these regions need to match.
...
SI_ME is at least 1M larger than necessary. […]
Actually that's not quite right, sorry. There's about 0.5M free when you include the SI_EC region which was added back in CB:58661 (which is what triggered this change).
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I94e0615088349af34020fb8a126fce9e72df9ee2
Gerrit-Change-Number: 59006
Gerrit-PatchSet: 2
Gerrit-Owner: Reka Norman rekanorman@chromium.org
Gerrit-Reviewer: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
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