Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack
FSP v1263 supports FSP to use coreboot stack. This change selects FSP 2.1 config, that enables support for coreboot to support shared stack with FSP.
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index d697620..48452eb 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -76,7 +76,7 @@ select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PARALLEL_MP_AP_WORK - select PLATFORM_USES_FSP2_0 + select PLATFORM_USES_FSP2_1 select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT @@ -123,6 +123,7 @@
config DCACHE_BSP_STACK_SIZE hex + default 0x20000 if FSP_USES_CB_STACK default 0x4000 help The amount of anticipated stack usage in CAR by bootblock and
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 1:
(1 comment)
Is this tested on CFL, CNL, WHL and CML? What happens if you use a FSP2.0 binary with this?
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG@9 PS1, Line 9: v1263 Can you explain this versioning scheme to me? The FSP on Github uses very different numbers. When will this v1263 be publicly available?
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34130
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack
FSP v1263 for CML supports FSP to use coreboot stack. This change selects FSP 2.1 config, that enables support for coreboot to support shared stack with FSP.
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/2
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 2:
(1 comment)
Patch Set 1:
(1 comment)
Is this tested on CFL, CNL, WHL and CML? What happens if you use a FSP2.0 binary with this?
This is tested on CML platforms, if we don't enable the config with v1263(start of shared stack support(FSP 2.1 feature)), we see hang in memory init call, where is fails to call a mem init API due to stack constraints.
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG@9 PS1, Line 9: v1263
Can you explain this versioning scheme to me? The FSP on Github uses […]
the 1 here is the year project started(1 is same year as it started), 26 is the work week(now is WW 28) and 3 is the day within the week so 3 is wednesday. That is when the label was created. On the external availability, I am not sure on the timelines
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 2:
(2 comments)
Is this tested on CFL, CNL, WHL and CML? What happens if you use a FSP2.0 binary with this?
This is tested on CML platforms, if we don't enable the config with v1263(start of shared stack support(FSP 2.1 feature)), we see hang in memory init call, where is fails to call a mem init API due to stack constraints.
Well, but what happens with an FSP2.0 binary? This change affects all platforms mentioned above. Will their existing binaries work with PLATFORM_USES_FSP2_1 selected?
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/1//COMMIT_MSG@9 PS1, Line 9: v1263
the 1 here is the year project started(1 is same year as it started), 26 is the work week(now is WW […]
Thanks.
https://review.coreboot.org/c/coreboot/+/34130/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/2//COMMIT_MSG@10 PS2, Line 10: 2.1 config, that enables support for coreboot to support shared stack with FSP. Please adhere to the 72-char line-length limit in commit messages.
Hello Patrick Rudolph, Paul Fagerburg, Subrata Banik, Tim Wawrzynczak, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34130
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack
FSP v1263 for CML supports FSP to use coreboot stack. This change selects FSP 2.1 config, that enables support for coreboot to support shared stack with FSP.
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/3
Hello Patrick Rudolph, Paul Fagerburg, Subrata Banik, Tim Wawrzynczak, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34130
to look at the new patch set (#4).
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack
FSP v1263 for CML supports FSP to use coreboot stack. This change selects FSP 2.1 config, that enables support for coreboot to support shared stack with FSP.
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/4
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 4:
I thought Bora had this CL already for WHL ? no ? for FSp 209 ?
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 4:
(1 comment)
Patch Set 2:
(2 comments)
Is this tested on CFL, CNL, WHL and CML? What happens if you use a FSP2.0 binary with this?
This is tested on CML platforms, if we don't enable the config with v1263(start of shared stack support(FSP 2.1 feature)), we see hang in memory init call, where is fails to call a mem init API due to stack constraints.
Well, but what happens with an FSP2.0 binary? This change affects all platforms mentioned above. Will their existing binaries work with PLATFORM_USES_FSP2_1 selected?
The changes are not compatible with FSP 2.0 and would see a FSP returning with error code. Revised code in PS#4 to limit common stack feature to CML.
https://review.coreboot.org/c/coreboot/+/34130/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/2//COMMIT_MSG@10 PS2, Line 10: 2.1 config, that enables support for coreboot to support shared stack with FSP.
Please adhere to the 72-char line-length limit in commit messages.
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG@10 PS4, Line 10: selects FSP 2.1 needs an update
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 4: Code-Review+1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG@7 PS4, Line 7: soc/intel/cannonlake: Enable FSP to use coreboot stack "for cometlake"
since it does not affect any other platform.
Hello Patrick Rudolph, Paul Fagerburg, Subrata Banik, Tim Wawrzynczak, Bora Guvendik, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34130
to look at the new patch set (#5).
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
FSP v1263 for CML supports FSP to use coreboot stack. This change selects common stack config, that enables coreboot to support share stack with FSP.
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/5
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG@7 PS4, Line 7: soc/intel/cannonlake: Enable FSP to use coreboot stack
"for cometlake" […]
Done
https://review.coreboot.org/c/coreboot/+/34130/4//COMMIT_MSG@10 PS4, Line 10: selects FSP 2.1
needs an update
Done
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Quick note: This change needs to have a CQ-DEPEND before it lands in chromium tree.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5: Code-Review-1
It seems to affect FSP-M only, but that's not documented. It requires a huge amount of stack, why? The Documentation wasn't updated to explain this new feature. It seems independent of EFI_MP_SERVICES_PPI.
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5: Code-Review-1
It seems to affect FSP-M only, but that's not documented. It requires a huge amount of stack, why? The Documentation wasn't updated to explain this new feature. It seems independent of EFI_MP_SERVICES_PPI.
Yes, it is required for FSP-M to execute, we'll have to allocate the stack out of CAR. The stack requirement is due to FSP_M execution, configuring it for lesser value, we see hang during FSP-M execution. The value configured here is actually less the than the stack size that was reserved by FSP for the implementation when FSP was setting up different stack(0x28000).
yes this is independent of the EFI_MP_SERVICES_PPI.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
Patch Set 5: Code-Review-1
It seems to affect FSP-M only, but that's not documented. It requires a huge amount of stack, why? The Documentation wasn't updated to explain this new feature. It seems independent of EFI_MP_SERVICES_PPI.
Yes, it is required for FSP-M to execute, we'll have to allocate the stack out of CAR. The stack requirement is due to FSP_M execution, configuring it for lesser value, we see hang during FSP-M execution. The value configured here is actually less the than the stack size that was reserved by FSP for the implementation when FSP was setting up different stack(0x28000).
yes this is independent of the EFI_MP_SERVICES_PPI.
Adding Nate if we have FSP2.1 spec available for Patrick.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
Patch Set 5:
Patch Set 5: Code-Review-1
It seems to affect FSP-M only, but that's not documented. It requires a huge amount of stack, why? The Documentation wasn't updated to explain this new feature. It seems independent of EFI_MP_SERVICES_PPI.
Yes, it is required for FSP-M to execute, we'll have to allocate the stack out of CAR. The stack requirement is due to FSP_M execution, configuring it for lesser value, we see hang during FSP-M execution. The value configured here is actually less the than the stack size that was reserved by FSP for the implementation when FSP was setting up different stack(0x28000).
yes this is independent of the EFI_MP_SERVICES_PPI.
Adding Nate if we have FSP2.1 spec available for Patrick.
The exact stack requirement should also be documented in the FSP_Integration_Guide.pdf that ships with each FSP release.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
It seems to affect FSP-M only, but that's not documented. It requires a huge amount of stack, why? The Documentation wasn't updated to explain this new feature. It seems independent of EFI_MP_SERVICES_PPI.
Yes, it is required for FSP-M to execute, we'll have to allocate the stack out of CAR. The stack requirement is due to FSP_M execution, configuring it for lesser value, we see hang during FSP-M execution. The value configured here is actually less the than the stack size that was reserved by FSP for the implementation when FSP was setting up different stack(0x28000).
yes this is independent of the EFI_MP_SERVICES_PPI.
Adding Nate if we have FSP2.1 spec available for Patrick.
The FSP2_1 selection was removed with patch set 4, so this is not about FSP 2.1 any more. Maybe you are somewhere in between?
Nathaniel L Desimone has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Hi All,
Subrata is correct that this change is for FSP 2.1. The FSP 2.1 spec is available publicly via intel.com:
https://cdrdv2.intel.com/v1/dl/getContent/611786
Please refer to section 6.1.2, page 25:
For FSP implementations compliant to v2.0 of this specification, the temporary RAM is used to establish a stack and a HOB heap. For FSP implementations compliant to v2.1 of this specification, the temporary RAM is only used for a HOB heap.
Starting with v2.1 of this specification, FSP will run on top of the stack provided by the bootloader instead of establishing a separate stack. This allows the stack memory to be reused after FspMemoryInit() returns to the bootloader. To retain backwards compatibility with earlier versions of this specification, this parameter retains the StackBase name
However, I believe this feature was moved in to the CoffeeLake FSP even though it technically only implements FSP spec v2.0. Accordingly, I agree that this should be mentioned in the CoffeeLake FSP integration guide if it is not already.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
Hi All,
Subrata is correct that this change is for FSP 2.1. The FSP 2.1 spec is available publicly via intel.com:
https://cdrdv2.intel.com/v1/dl/getContent/611786
Please refer to section 6.1.2, page 25:
For FSP implementations compliant to v2.0 of this specification, the temporary RAM is used to establish a stack and a HOB heap. For FSP implementations compliant to v2.1 of this specification, the temporary RAM is only used for a HOB heap.
Starting with v2.1 of this specification, FSP will run on top of the stack provided by the bootloader instead of establishing a separate stack. This allows the stack memory to be reused after FspMemoryInit() returns to the bootloader. To retain backwards compatibility with earlier versions of this specification, this parameter retains the StackBase name
However, I believe this feature was moved in to the CoffeeLake FSP even though it technically only implements FSP spec v2.0. Accordingly, I agree that this should be mentioned in the CoffeeLake FSP integration guide if it is not already.
Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
However, I believe this feature was moved in to the CoffeeLake FSP even though it technically only implements FSP spec v2.0. Accordingly, I agree that this should be mentioned in the CoffeeLake FSP integration guide if it is not already.
Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.
I'm willing to merge the patch as is, even before these items are published if a bug is filed in the coreboot bug system for the updates mentioned above. Before that's done to track the requested updates, I'm hesitant to merge it.
https://ticket.coreboot.org/projects/coreboot
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Hi Aamir, Could you please address Patrick's requests?
- Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.
Thanks.
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
Hi Aamir, Could you please address Patrick's requests?
- Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.
Thanks.
Hi Martin,
I'll raise a bug to track the documentation and update the CL with bug link. We will have to work on documentation update.
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
Patch Set 5:
Patch Set 5:
Hi Aamir, Could you please address Patrick's requests?
- Please also publish the integration guide, as the external specification guide doesn't specify the exact HOB heap size requirements.
Thanks.
Hi Martin,
I'll raise a bug to track the documentation and update the CL with bug link. We will have to work on documentation update.
Hi Martin,
I have raised a ticket to track the FSP integration guide update. We will work with the team and share a revised guide. https://ticket.coreboot.org/issues/222
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5: -Code-Review
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 5:
(1 comment)
Just a note: When cherry-picking this to chromium tree, we need to add CQ-DEPEND on other changes for FSP update.
https://review.coreboot.org/c/coreboot/+/34130/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/5//COMMIT_MSG@12 PS5, Line 12: BUG=b:133398276
Hello Patrick Rudolph, Nathaniel L Desimone, Paul Fagerburg, Subrata Banik, Patrick Rudolph, Tim Wawrzynczak, Bora Guvendik, build bot (Jenkins), Nico Huber, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34130
to look at the new patch set (#6).
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
FSP v1263 for CML supports FSP to use coreboot stack. This change selects common stack config, that enables coreboot to support share stack with FSP.
BUG=b:133398276
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34130/6
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34130/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34130/5//COMMIT_MSG@12 PS5, Line 12:
BUG=b:133398276
Done
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34130 )
Change subject: soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake ......................................................................
soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
FSP v1263 for CML supports FSP to use coreboot stack. This change selects common stack config, that enables coreboot to support share stack with FSP.
BUG=b:133398276
Change-Id: I4098a4374363ca6f3c86c396d097f9eabc9a28fe Signed-off-by: Aamir Bohra aamir.bohra@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34130 Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Paul Fagerburg pfagerburg@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/cannonlake/Kconfig 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved Paul Fagerburg: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 862b2e6..aa0570d 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -36,6 +36,7 @@ bool select SOC_INTEL_CANNONLAKE_BASE select MICROCODE_BLOB_UNDISCLOSED + select FSP_USES_CB_STACK help Intel Cometlake support
@@ -122,6 +123,7 @@
config DCACHE_BSP_STACK_SIZE hex + default 0x20000 if FSP_USES_CB_STACK default 0x4000 help The amount of anticipated stack usage in CAR by bootblock and
-
Aamir Bohra (Code Review) -
Furquan Shaikh (Code Review)
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Martin Roth (Code Review)
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Nathaniel L Desimone (Code Review)
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Nico Huber (Code Review)
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Patrick Georgi (Code Review)
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Patrick Rudolph (Code Review)
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Paul Fagerburg (Code Review)
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Subrata Banik (Code Review)