[S] Change in coreboot[main]: soc/intel/cannonlake: Hook up Intel TXT FSP UPDs

[Krystian Hebel (Code Review)]

Attention is currently required from: Filip Lewiński, Michał Kopeć, Michał Żygowski, Paul Menzel.

Krystian Hebel has posted comments on this change by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/83727?usp=email )

Change subject: soc/intel/cannonlake: Hook up Intel TXT FSP UPDs
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Patch Set 3:

(1 comment)

File src/soc/intel/cannonlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/83727/comment/08664faa_159bd733?usp... :
PS3, Line 152: 	m_cfg->ApStartupBase = 1; /* Set to non-zero, FSP does NULL check */
Doesn't this cause APs to eventually jump to address 1 and (most likely) hit an exception at some point because there is no valid code at that address? With regard to CB:82697, this may put APs in a state from which they can't be brought back to do other tasks (e.g. shutdown after a triple-fault). Wouldn't it be better to end the execution with something like `stop_this_cpu()` instead?