Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Paul Menzel.
Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................
Patch Set 10:
(3 comments)
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84103/comment/1f5c6bb0_3fc4cb9e?usp... :
PS10, Line 132: platforms
u can specify from which SoC?
https://review.coreboot.org/c/coreboot/+/84103/comment/cf17bc17_c68581f3?usp... :
PS10, Line 134: SOD
SoC?
https://review.coreboot.org/c/coreboot/+/84103/comment/1b35f9cb_60ee36dc?usp... :
PS10, Line 138:
: #if !CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1)
: #define GPE1_STS(x) (0x0 + ((x) * 4))
: #define GPE1_REG_MAX 0
: #endif
please move the macros at line #9
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