Attention is currently required from: Rizwan Qureshi, Sridhar Siricilla. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56073 )
Change subject: mb/intel/adlrvp: Update PMC Descriptor for Alder lake A0(0x906a0) silicon ......................................................................
Patch Set 1:
(3 comments)
File src/mainboard/intel/adlrvp/bootblock.c:
https://review.coreboot.org/c/coreboot/+/56073/comment/edd1b77f_efea1a52 PS1, Line 5: #include <console/console.h> We do sort our include in an alphabetical order.
https://review.coreboot.org/c/coreboot/+/56073/comment/80f3f1d3_2857db19 PS1, Line 9: include <console/console.h> This include is already there on line 5.
https://review.coreboot.org/c/coreboot/+/56073/comment/471d5145_4182efbe PS1, Line 36: if (rdev_eraseat(&desc_rdev, 0, SI_DESC_REGION_SZ) != SI_DESC_REGION_SZ) { : printk(BIOS_ERR, "Failed to erase Descriptor Region area\n"); : return; : } : : if (rdev_writeat(&desc_rdev, si_desc_buf, 0, SI_DESC_REGION_SZ) : != SI_DESC_REGION_SZ) { : printk(BIOS_ERR, "Failed to update Descriptor Region\n"); : return; : } Isn't this only possible if you have granted write permission to the x86 host for the descriptor region? Would it make sense to check this to avoid a endless reset-loop here if the write permission is missing?