Change in coreboot[master]: mb/google/guybrush/var/guybrush: Add Codec and Speaker configration

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52046 )

Change subject: mb/google/guybrush/var/guybrush: Add Codec and Speaker configration
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mb/google/guybrush/var/guybrush: Add Codec and Speaker configration

Enable I2C2 in devicetree and fill ACPI information for Codec and
Speaker amplifiers. Pass correct IRQ GPIO for headset jack.

BUG=None
BRANCH=None
TEST=Ensure that the Codec and Speaker Amplifiers are detected in
i2cdetect.

Change-Id: I1ae52a8bbaa0181c906cd14a94de22e0250ed4c1
Signed-off-by: Karthikeyan Ramasubramanian 
---
M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
1 file changed, 27 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/52046/1

diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
index 5f9b037..707a63f 100644
--- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
+++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
@@ -71,4 +71,31 @@
    		device i2c 15 on end
    	end
    end # I2C0
+
+	device ref i2c_2 on
+		chip drivers/i2c/generic
+			register "hid" = ""10EC5682""
+			register "name" = ""RT58""
+			register "desc" = ""Realtek RT5682""
+			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)"
+			register "property_count" = "1"
+			register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+			register "property_list[0].name" = ""realtek,jd-src""
+			register "property_list[0].integer" = "1"
+			device i2c 1a on end
+		end
+		chip drivers/i2c/generic
+			register "hid" = ""10EC1019""
+			register "desc" = ""Realtek SPK AMP L""
+			register "uid" = "0"
+			device i2c 28 on end
+		end
+		chip drivers/i2c/generic
+			register "hid" = ""10EC1019""
+			register "desc" = ""Realtek SPK AMP R""
+			register "uid" = "1"
+			device i2c 29 on end
+		end
+	end # I2C2
+
 end	# chip soc/amd/cezanne