Attention is currently required from: Federico Amedeo Izzo.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email )
Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ......................................................................
Patch Set 2:
(10 comments)
Patchset:
PS2: Hi, and thanks for contributing!
File src/mainboard/aoostar/wtr_r1/bootblock.c:
https://review.coreboot.org/c/coreboot/+/82010/comment/64fccfa9_781c42e0 : PS2, Line 1: Remove blank line
File src/mainboard/aoostar/wtr_r1/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/82010/comment/cab6dc78_e7a1ccaa : PS2, Line 16: register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1 : register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # Type-C Port2 : register "usb2_ports[2]" = "USB2_PORT_MID(OC3)" # FPS connector : register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN : register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A port1 : register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # USB3/2 Type A port2 : register "usb2_ports[6]" = "USB2_PORT_MID(OC1)" # USB3/2 Type A port3 : register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type A/ M.2 WLAN : register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth : : register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port1 : register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port2 : register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port3 : r Please move into the devicetree below.
https://review.coreboot.org/c/coreboot/+/82010/comment/f0e8b80d_e1026757 : PS2, Line 81: device ref ipu off end Already disabled in chipset devicetree, remove.
https://review.coreboot.org/c/coreboot/+/82010/comment/bb4b3539_bbd67f78 : PS2, Line 117: device ref heci1 on end Enabled in chipset devicetree, remove.
https://review.coreboot.org/c/coreboot/+/82010/comment/e267df02_7847be35 : PS2, Line 230: device ref p2sb on end P2SB is hidden by the FSP, which is configured accordingly in chipset devicetree. Remove.
https://review.coreboot.org/c/coreboot/+/82010/comment/ff7ec4cf_c2215fa1 : PS2, Line 231: device ref emmc off end Already disabled in chipset devicetree, remove.
https://review.coreboot.org/c/coreboot/+/82010/comment/66fa3c7a_8e8f5919 : PS2, Line 233: device ref ufs off end Already disabled in chipset devicetree, remove.
File src/mainboard/aoostar/wtr_r1/gpio.h:
PS2: Remove comments to GPIOs which are configured with PAD_NC.
https://review.coreboot.org/c/coreboot/+/82010/comment/ed74f689_e3133600 : PS2, Line 222: /* ------- GPIO Group PCIe vGPIO ------- */ Remove the superfluous comments below.