Jg Daolongzhu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50224 )
Change subject: WIP: soc/mediatek/mt8192: modify i2c ext_conf ......................................................................
WIP: soc/mediatek/mt8192: modify i2c ext_conf
modify ext_conf to adjust tsu,sta/thd,sta/ tsu,sto
TEST=Boots correctly on MT8192P1
Signed-off-by: jg_daolongzhu jg_daolongzhu@mediatek.corp-partner.google.com Change-Id: I0dbcda495ec6f7a8adc51d674dffffef6999745c --- M src/soc/mediatek/common/i2c.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/50224/1
diff --git a/src/soc/mediatek/common/i2c.c b/src/soc/mediatek/common/i2c.c old mode 100644 new mode 100755 index 3c54b17..d5a22cb3 --- a/src/soc/mediatek/common/i2c.c +++ b/src/soc/mediatek/common/i2c.c @@ -118,6 +118,7 @@ I2C_HS_NACKERR);
write32(®s->fifo_addr_clr, 0x1); + write32(®s->ext_conf, 0x601);
/* Enable interrupt */ write32(®s->intr_mask, I2C_HS_NACKERR | I2C_ACKERR | @@ -191,7 +192,7 @@
write32(&dma_regs->dma_int_flag, I2C_DMA_CLR_FLAG); write32(&dma_regs->dma_en, I2C_DMA_START_EN); - +printk(BIOS_ERR, "[mtk_debug][i2c%d][addr0x%x] ext_conf(0x%x)\n", bus, addr, read32(®s->ext_conf)); /* start transfer transaction */ write32(®s->start, 0x1);