[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PLL and Clock init support

[Jarried Lin (Code Review)]

Attention is currently required from: Guangjie Song, Hung-Te Lin, Jarried Lin, Paul Menzel.

Hello Guangjie Song, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84495?usp=email

to look at the new patch set (#25).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/mediatek/mt8196: Add PLL and Clock init support
......................................................................

soc/mediatek/mt8196: Add PLL and Clock init support

Add PLL and clock init code, frequency meter and APIs for raising little
CPU frequency and set tvdpll frequency.

TEST=build pass and driver init ok
BUG=b:317009620

Signed-off-by: Guangjie Song 
Change-Id: Icac99fb210c87c8b7b14af627fbd2f14e4c47240
---
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/bootblock.c
M src/soc/mediatek/mt8196/include/soc/addressmap.h
M src/soc/mediatek/mt8196/include/soc/memlayout.ld
M src/soc/mediatek/mt8196/include/soc/pll.h
A src/soc/mediatek/mt8196/pll.c
6 files changed, 2,260 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/84495/25