Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, Matt DeVillier, Fred Reitberger, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69867
to look at the new patch set (#2).
Change subject: soc/amd: Define post codes ......................................................................
soc/amd: Define post codes
For the most part, this doesn't change any post codes, simply making the existing post-codes into macros.
picasso/romstage.c did get a couple of post codes removed to match the other files.
The POST_ROMSTAGE and POST_BOOTBLOCK codes are intended to become global at some point, while the POST_AGESA and POST_PSP codes would stay AMD specific.
Change-Id: I007a09b6a3ed3280bac674cd74e298ec5c408ab7 Signed-off-by: Martin Roth gaumless@gmail.com --- M src/soc/amd/cezanne/romstage.c M src/soc/amd/common/block/cpu/car/cache_as_ram.S M src/soc/amd/common/block/cpu/noncar/pre_c.S A src/soc/amd/common/block/include/amdblocks/post_codes.h M src/soc/amd/glinda/romstage.c M src/soc/amd/mendocino/romstage.c M src/soc/amd/morgana/romstage.c M src/soc/amd/picasso/romstage.c M src/soc/amd/stoneyridge/bootblock.c M src/soc/amd/stoneyridge/chip.c M src/soc/amd/stoneyridge/romstage.c 11 files changed, 86 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/69867/2