Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rui Zhou.
Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84997?usp=email
to look at the new patch set (#21).
Change subject: mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3 ......................................................................
mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
The previous GPIO config will cause the SSD device to not be recognized. Based on schematics NB7559_MB_SCH_V1_2024_1010.pdf. So we adjust the position of the enable and reset pins.
BUG=b:374629673 BRANCH=None TEST=1. emerge-nissa coreboot chromeos-bootimage 2. power on proto board successfully
Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Signed-off-by: Rui Zhou zhourui@huaqin.corp-partner.google.com --- M src/mainboard/google/brya/variants/rull/gpio.c M src/mainboard/google/brya/variants/rull/overridetree.cb 2 files changed, 17 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/84997/21