HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44612 )
Change subject: mb/amd: Drop unneeded empty lines ......................................................................
mb/amd: Drop unneeded empty lines
Change-Id: Ib82689150689716bc9afdf8d4527a1dcd5deae56 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/inagua/OemCustomize.c M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/padmelon/bootblock/OemCustomize.c M src/mainboard/amd/parmer/OemCustomize.c M src/mainboard/amd/persimmon/OemCustomize.c M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/OemCustomize.c M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/thatcher/BiosCallOuts.c M src/mainboard/amd/thatcher/OemCustomize.c M src/mainboard/amd/union_station/platform_cfg.h 12 files changed, 0 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/44612/1
diff --git a/src/mainboard/amd/inagua/OemCustomize.c b/src/mainboard/amd/inagua/OemCustomize.c index f9cf2ca..0338115 100644 --- a/src/mainboard/amd/inagua/OemCustomize.c +++ b/src/mainboard/amd/inagua/OemCustomize.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h> diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index 5342755..48afb3f 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -31,7 +31,6 @@ gpio_100_write8(0x32, 0x48); }
- /********************************************** * Enable the dedicated functions of the board. **********************************************/ diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/padmelon/bootblock/OemCustomize.c b/src/mainboard/amd/padmelon/bootblock/OemCustomize.c index dbdfa47..6937429 100644 --- a/src/mainboard/amd/padmelon/bootblock/OemCustomize.c +++ b/src/mainboard/amd/padmelon/bootblock/OemCustomize.c @@ -95,7 +95,6 @@
};
- static const PCIe_DDI_DESCRIPTOR DdiList[] = { /* DP0 */ { diff --git a/src/mainboard/amd/parmer/OemCustomize.c b/src/mainboard/amd/parmer/OemCustomize.c index e10da6f..352ab25 100644 --- a/src/mainboard/amd/parmer/OemCustomize.c +++ b/src/mainboard/amd/parmer/OemCustomize.c @@ -5,7 +5,6 @@
#include <northbridge/amd/agesa/state_machine.h>
- /* * Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping) * diff --git a/src/mainboard/amd/persimmon/OemCustomize.c b/src/mainboard/amd/persimmon/OemCustomize.c index 167a857..14fff7d 100644 --- a/src/mainboard/amd/persimmon/OemCustomize.c +++ b/src/mainboard/amd/persimmon/OemCustomize.c @@ -1,11 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h>
- static const PCIe_PORT_DESCRIPTOR PortList[] = { // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...) { diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index 87a5cc4..d472ad0 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/south_station/OemCustomize.c b/src/mainboard/amd/south_station/OemCustomize.c index 14574f0..339469b 100644 --- a/src/mainboard/amd/south_station/OemCustomize.c +++ b/src/mainboard/amd/south_station/OemCustomize.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h> diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c index 1cba1a3..4dddaef 100644 --- a/src/mainboard/amd/thatcher/BiosCallOuts.c +++ b/src/mainboard/amd/thatcher/BiosCallOuts.c @@ -154,7 +154,6 @@ } }
- void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); diff --git a/src/mainboard/amd/thatcher/OemCustomize.c b/src/mainboard/amd/thatcher/OemCustomize.c index ec1f0ae..23cda27 100644 --- a/src/mainboard/amd/thatcher/OemCustomize.c +++ b/src/mainboard/amd/thatcher/OemCustomize.c @@ -5,7 +5,6 @@
#include <northbridge/amd/agesa/state_machine.h>
- /* * Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping) * diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44612
to look at the new patch set (#2).
Change subject: mb/amd: Drop unneeded empty lines ......................................................................
mb/amd: Drop unneeded empty lines
Change-Id: Ib82689150689716bc9afdf8d4527a1dcd5deae56 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/gardenia/acpi/routing.asl M src/mainboard/amd/inagua/OemCustomize.c M src/mainboard/amd/inagua/acpi/gpe.asl M src/mainboard/amd/inagua/acpi/sata.asl M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/olivehill/acpi/routing.asl M src/mainboard/amd/padmelon/acpi/routing.asl M src/mainboard/amd/padmelon/bootblock/OemCustomize.c M src/mainboard/amd/parmer/OemCustomize.c M src/mainboard/amd/parmer/acpi/gpe.asl M src/mainboard/amd/persimmon/OemCustomize.c M src/mainboard/amd/persimmon/acpi/gpe.asl M src/mainboard/amd/persimmon/acpi/routing.asl M src/mainboard/amd/persimmon/acpi/sata.asl M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/OemCustomize.c M src/mainboard/amd/south_station/acpi/gpe.asl M src/mainboard/amd/south_station/acpi/sata.asl M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/thatcher/BiosCallOuts.c M src/mainboard/amd/thatcher/OemCustomize.c M src/mainboard/amd/thatcher/acpi/gpe.asl M src/mainboard/amd/union_station/acpi/gpe.asl M src/mainboard/amd/union_station/acpi/sata.asl M src/mainboard/amd/union_station/platform_cfg.h 26 files changed, 0 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/44612/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44612 )
Change subject: mb/amd: Drop unneeded empty lines ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44612 )
Change subject: mb/amd: Drop unneeded empty lines ......................................................................
mb/amd: Drop unneeded empty lines
Change-Id: Ib82689150689716bc9afdf8d4527a1dcd5deae56 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/44612 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/amd/gardenia/acpi/routing.asl M src/mainboard/amd/inagua/OemCustomize.c M src/mainboard/amd/inagua/acpi/gpe.asl M src/mainboard/amd/inagua/acpi/sata.asl M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/inagua/platform_cfg.h M src/mainboard/amd/olivehill/acpi/routing.asl M src/mainboard/amd/padmelon/acpi/routing.asl M src/mainboard/amd/padmelon/bootblock/OemCustomize.c M src/mainboard/amd/parmer/OemCustomize.c M src/mainboard/amd/parmer/acpi/gpe.asl M src/mainboard/amd/persimmon/OemCustomize.c M src/mainboard/amd/persimmon/acpi/gpe.asl M src/mainboard/amd/persimmon/acpi/routing.asl M src/mainboard/amd/persimmon/acpi/sata.asl M src/mainboard/amd/persimmon/platform_cfg.h M src/mainboard/amd/south_station/OemCustomize.c M src/mainboard/amd/south_station/acpi/gpe.asl M src/mainboard/amd/south_station/acpi/sata.asl M src/mainboard/amd/south_station/platform_cfg.h M src/mainboard/amd/thatcher/BiosCallOuts.c M src/mainboard/amd/thatcher/OemCustomize.c M src/mainboard/amd/thatcher/acpi/gpe.asl M src/mainboard/amd/union_station/acpi/gpe.asl M src/mainboard/amd/union_station/acpi/sata.asl M src/mainboard/amd/union_station/platform_cfg.h 26 files changed, 0 insertions(+), 33 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/amd/gardenia/acpi/routing.asl b/src/mainboard/amd/gardenia/acpi/routing.asl index d4d1c4a..d362ca9 100644 --- a/src/mainboard/amd/gardenia/acpi/routing.asl +++ b/src/mainboard/amd/gardenia/acpi/routing.asl @@ -10,7 +10,6 @@ Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 1, INTC, 0 },
- /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */ Package(){0x0002FFFF, 0, INTC, 0 }, Package(){0x0002FFFF, 1, INTD, 0 }, @@ -70,7 +69,6 @@ Package(){0x0011FFFF, 0, 0, 19 }, })
- /* GPP 0 */ Name(PS4, Package(){ Package(){0x0000FFFF, 0, INTA, 0 }, diff --git a/src/mainboard/amd/inagua/OemCustomize.c b/src/mainboard/amd/inagua/OemCustomize.c index f9cf2ca..0338115 100644 --- a/src/mainboard/amd/inagua/OemCustomize.c +++ b/src/mainboard/amd/inagua/OemCustomize.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h> diff --git a/src/mainboard/amd/inagua/acpi/gpe.asl b/src/mainboard/amd/inagua/acpi/gpe.asl index 4fd7b9f..16fe45f 100644 --- a/src/mainboard/amd/inagua/acpi/gpe.asl +++ b/src/mainboard/amd/inagua/acpi/gpe.asl @@ -30,7 +30,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/inagua/acpi/sata.asl b/src/mainboard/amd/inagua/acpi/sata.asl index 7f305fb..9344ff1 100644 --- a/src/mainboard/amd/inagua/acpi/sata.asl +++ b/src/mainboard/amd/inagua/acpi/sata.asl @@ -58,7 +58,6 @@ } /* end of PSLA */ } /* end of PMRY */
- Device(SEDY) { Name(_ADR, 1) /* IDE Scondary Channel */ diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index 5342755..48afb3f 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -31,7 +31,6 @@ gpio_100_write8(0x32, 0x48); }
- /********************************************** * Enable the dedicated functions of the board. **********************************************/ diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/inagua/platform_cfg.h +++ b/src/mainboard/amd/inagua/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/olivehill/acpi/routing.asl b/src/mainboard/amd/olivehill/acpi/routing.asl index 106259d..9bce4b2 100644 --- a/src/mainboard/amd/olivehill/acpi/routing.asl +++ b/src/mainboard/amd/olivehill/acpi/routing.asl @@ -10,7 +10,6 @@ Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 1, INTC, 0 },
- /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */ Package(){0x0002FFFF, 0, INTC, 0 }, Package(){0x0002FFFF, 1, INTD, 0 }, @@ -58,7 +57,6 @@ Package(){0x0002FFFF, 2, 0, 26 }, Package(){0x0002FFFF, 3, 0, 27 },
- /* SB devices in APIC mode */ /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ Package(){0x0014FFFF, 0, 0, 16 }, diff --git a/src/mainboard/amd/padmelon/acpi/routing.asl b/src/mainboard/amd/padmelon/acpi/routing.asl index 40a1b5b..de6ff3d 100644 --- a/src/mainboard/amd/padmelon/acpi/routing.asl +++ b/src/mainboard/amd/padmelon/acpi/routing.asl @@ -10,7 +10,6 @@ Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 1, INTC, 0 },
- /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */ Package(){0x0002FFFF, 0, INTC, 0 }, Package(){0x0002FFFF, 1, INTD, 0 }, diff --git a/src/mainboard/amd/padmelon/bootblock/OemCustomize.c b/src/mainboard/amd/padmelon/bootblock/OemCustomize.c index dbdfa47..6937429 100644 --- a/src/mainboard/amd/padmelon/bootblock/OemCustomize.c +++ b/src/mainboard/amd/padmelon/bootblock/OemCustomize.c @@ -95,7 +95,6 @@
};
- static const PCIe_DDI_DESCRIPTOR DdiList[] = { /* DP0 */ { diff --git a/src/mainboard/amd/parmer/OemCustomize.c b/src/mainboard/amd/parmer/OemCustomize.c index e10da6f..352ab25 100644 --- a/src/mainboard/amd/parmer/OemCustomize.c +++ b/src/mainboard/amd/parmer/OemCustomize.c @@ -5,7 +5,6 @@
#include <northbridge/amd/agesa/state_machine.h>
- /* * Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping) * diff --git a/src/mainboard/amd/parmer/acpi/gpe.asl b/src/mainboard/amd/parmer/acpi/gpe.asl index 726e111..91bcabc 100644 --- a/src/mainboard/amd/parmer/acpi/gpe.asl +++ b/src/mainboard/amd/parmer/acpi/gpe.asl @@ -35,7 +35,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/persimmon/OemCustomize.c b/src/mainboard/amd/persimmon/OemCustomize.c index 167a857..14fff7d 100644 --- a/src/mainboard/amd/persimmon/OemCustomize.c +++ b/src/mainboard/amd/persimmon/OemCustomize.c @@ -1,11 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h>
- static const PCIe_PORT_DESCRIPTOR PortList[] = { // Initialize Port descriptor (PCIe port, Lanes 4, PCI Device Number 4, ...) { diff --git a/src/mainboard/amd/persimmon/acpi/gpe.asl b/src/mainboard/amd/persimmon/acpi/gpe.asl index 4fd7b9f..16fe45f 100644 --- a/src/mainboard/amd/persimmon/acpi/gpe.asl +++ b/src/mainboard/amd/persimmon/acpi/gpe.asl @@ -30,7 +30,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/persimmon/acpi/routing.asl b/src/mainboard/amd/persimmon/acpi/routing.asl index 656a0be..b7fd53a 100644 --- a/src/mainboard/amd/persimmon/acpi/routing.asl +++ b/src/mainboard/amd/persimmon/acpi/routing.asl @@ -41,7 +41,6 @@
/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
- /* SB devices */ /* Bus 0, Dev 17 - SATA controller */ Package(){0x0011FFFF, 0, INTD, 0 }, diff --git a/src/mainboard/amd/persimmon/acpi/sata.asl b/src/mainboard/amd/persimmon/acpi/sata.asl index 7f305fb..9344ff1 100644 --- a/src/mainboard/amd/persimmon/acpi/sata.asl +++ b/src/mainboard/amd/persimmon/acpi/sata.asl @@ -58,7 +58,6 @@ } /* end of PSLA */ } /* end of PMRY */
- Device(SEDY) { Name(_ADR, 1) /* IDE Scondary Channel */ diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index 87a5cc4..d472ad0 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/south_station/OemCustomize.c b/src/mainboard/amd/south_station/OemCustomize.c index 14574f0..339469b 100644 --- a/src/mainboard/amd/south_station/OemCustomize.c +++ b/src/mainboard/amd/south_station/OemCustomize.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #include <AGESA.h> #include <northbridge/amd/agesa/state_machine.h> #include <PlatformMemoryConfiguration.h> diff --git a/src/mainboard/amd/south_station/acpi/gpe.asl b/src/mainboard/amd/south_station/acpi/gpe.asl index 4fd7b9f..16fe45f 100644 --- a/src/mainboard/amd/south_station/acpi/gpe.asl +++ b/src/mainboard/amd/south_station/acpi/gpe.asl @@ -30,7 +30,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/south_station/acpi/sata.asl b/src/mainboard/amd/south_station/acpi/sata.asl index 7f305fb..9344ff1 100644 --- a/src/mainboard/amd/south_station/acpi/sata.asl +++ b/src/mainboard/amd/south_station/acpi/sata.asl @@ -58,7 +58,6 @@ } /* end of PSLA */ } /* end of PMRY */
- Device(SEDY) { Name(_ADR, 1) /* IDE Scondary Channel */ diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/south_station/platform_cfg.h +++ b/src/mainboard/amd/south_station/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c index 1cba1a3..4dddaef 100644 --- a/src/mainboard/amd/thatcher/BiosCallOuts.c +++ b/src/mainboard/amd/thatcher/BiosCallOuts.c @@ -154,7 +154,6 @@ } }
- void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); diff --git a/src/mainboard/amd/thatcher/OemCustomize.c b/src/mainboard/amd/thatcher/OemCustomize.c index ec1f0ae..23cda27 100644 --- a/src/mainboard/amd/thatcher/OemCustomize.c +++ b/src/mainboard/amd/thatcher/OemCustomize.c @@ -5,7 +5,6 @@
#include <northbridge/amd/agesa/state_machine.h>
- /* * Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping) * diff --git a/src/mainboard/amd/thatcher/acpi/gpe.asl b/src/mainboard/amd/thatcher/acpi/gpe.asl index 726e111..91bcabc 100644 --- a/src/mainboard/amd/thatcher/acpi/gpe.asl +++ b/src/mainboard/amd/thatcher/acpi/gpe.asl @@ -35,7 +35,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/union_station/acpi/gpe.asl b/src/mainboard/amd/union_station/acpi/gpe.asl index 4fd7b9f..16fe45f 100644 --- a/src/mainboard/amd/union_station/acpi/gpe.asl +++ b/src/mainboard/amd/union_station/acpi/gpe.asl @@ -30,7 +30,6 @@ /* DBGO("\_GPE\_L10\n") */ }
- /* ExtEvent1 SCI event */ Method(_L11) { /* DBGO("\_GPE\_L11\n") */ diff --git a/src/mainboard/amd/union_station/acpi/sata.asl b/src/mainboard/amd/union_station/acpi/sata.asl index 7f305fb..9344ff1 100644 --- a/src/mainboard/amd/union_station/acpi/sata.asl +++ b/src/mainboard/amd/union_station/acpi/sata.asl @@ -58,7 +58,6 @@ } /* end of PSLA */ } /* end of PMRY */
- Device(SEDY) { Name(_ADR, 1) /* IDE Scondary Channel */ diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h index efbadbb..38447ac 100644 --- a/src/mainboard/amd/union_station/platform_cfg.h +++ b/src/mainboard/amd/union_station/platform_cfg.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
- #ifndef _PLATFORM_CFG_H_ #define _PLATFORM_CFG_H_
@@ -109,7 +108,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1
- /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically.
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
-
Patrick Georgi (Code Review)