New patch to review for coreboot: f56520f AMD AGESA boards: Reference arrays by variable name and not first element

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3325

-gerrit

commit f56520f79e588256ff057c1a872964db5e871659
Author: Paul Menzel 
Date:   Tue May 28 20:38:56 2013 +0200

AMD AGESA boards: Reference arrays by variable name and not first element

Not yet ready. The former patches can be submitted. Though.

Additionally for arrays like `… PortList [] …`, instead of
    `&PortList[0]` reference them by `PortList` as suggested by
    Ron G. Minnich [1].

[1] http://review.coreboot.org/#/c/3247/3/src/mainboard/asus/f2a85-m/PlatformGnb...

Change-Id: Ie6be0e42ec2cfb57a8d2cb2aec497a5c5387d015
    Signed-off-by: Paul Menzel 
---
 src/mainboard/asrock/e350m1/PlatformGnbPcie.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
index 50a8db9..e564851 100644
--- a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
+++ b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
@@ -109,8 +109,8 @@ PCIe_DDI_DESCRIPTOR DdiList [] = {
 PCIe_COMPLEX_DESCRIPTOR Brazos = {
         DESCRIPTOR_TERMINATE_LIST,
         0,
-        &PortList[0],
-        &DdiList[0]
+        PortList,
+        DdiList
 };

// GNB PCIe topology Porting
@@ -153,8 +153,8 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
                    &InitEarly->StdHeader);

LibAmdMemCopy  (BrazosPcieComplexListPtr, &Brazos, sizeof(Brazos), &InitEarly->StdHeader);
-  LibAmdMemCopy  (BrazosPciePortPtr, &PortList[0], sizeof(PortList), &InitEarly->StdHeader);
-  LibAmdMemCopy  (BrazosPcieDdiPtr, &DdiList[0], sizeof(DdiList), &InitEarly->StdHeader);
+  LibAmdMemCopy  (BrazosPciePortPtr, PortList, sizeof(PortList), &InitEarly->StdHeader);
+  LibAmdMemCopy  (BrazosPcieDdiPtr, DdiList, sizeof(DdiList), &InitEarly->StdHeader);

((PCIe_COMPLEX_DESCRIPTOR*)BrazosPcieComplexListPtr)->PciePortList =  (PCIe_PORT_DESCRIPTOR*)BrazosPciePortPtr;