tinghan shen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 5d1c0ae..11588c8 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -51,6 +51,7 @@ ramstage-y += devapc.c ramstage-y += mcupm.c ramstage-y += soc.c +ramstage-y += sspm.c ramstage-y += ufs.c ramstage-y += ../common/mtlib.c ramstage-y += ../common/timer.c @@ -74,6 +75,11 @@ spm_firmware.bin-type := raw spm_firmware.bin-compression := $(CBFS_COMPRESS_FLAG)
+cbfs-files-y += sspm.bin +sspm.bin-file := $(MT8192_BLOB_DIR)/sspm.bin +sspm.bin-type := raw +sspm.bin-compression := $(CBFS_COMPRESS_FLAG) + cbfs-files-y += mcupm.bin mcupm.bin-file := $(MT8192_BLOB_DIR)/mcupm.bin mcupm.bin-type := raw diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index eb75823..397fa29 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -33,6 +33,8 @@ EMI_BASE = IO_PHYS + 0x00219000, EMI_MPU_BASE = IO_PHYS + 0x00226000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, + SSPM_SRAM_BASE = IO_PHYS + 0x00400000, + SSPM_CFG_BASE = IO_PHYS + 0x00440000, AUXADC_BASE = IO_PHYS + 0x01001000, DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000, DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000, diff --git a/src/soc/mediatek/mt8192/include/soc/sspm.h b/src/soc/mediatek/mt8192/include/soc/sspm.h new file mode 100644 index 0000000..5749fa4 --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/sspm.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_SSPM_H +#define SOC_MEDIATEK_MT8192_SSPM_H + +#include <soc/addressmap.h> +#include <types.h> + +struct mt8192_sspm_regs { + u32 sw_rstn; +}; +static struct mt8192_sspm_regs *const mt8192_sspm = (void *)SSPM_CFG_BASE; +void sspm_init(void); +#endif /* SOC_MEDIATEK_MT8192_SSPM_H */ diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 5a2fa37..883f4dc 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -5,6 +5,7 @@ #include <soc/emi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/sspm.h> #include <soc/ufs.h> #include <symbols.h>
@@ -18,6 +19,7 @@ mtk_mmu_disable_l2c_sram(); dapc_init(); mcupm_init(); + sspm_init(); ufs_disable_refclk(); }
diff --git a/src/soc/mediatek/mt8192/sspm.c b/src/soc/mediatek/mt8192/sspm.c new file mode 100644 index 0000000..a555d76 --- /dev/null +++ b/src/soc/mediatek/mt8192/sspm.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/mtlib_common.h> +#include <soc/sspm.h> + +void sspm_init(void) +{ + const char *sspm_file_name = "sspm.bin"; + + if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { + write32(&mt8192_sspm->sw_rstn, 0x1); + } +}
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/1/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/1/src/soc/mediatek/mt8192/ssp... PS1, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/2/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/2/src/soc/mediatek/mt8192/ssp... PS2, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Yidi Lin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47786
to look at the new patch set (#3).
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/3
Yidi Lin has uploaded a new patch set (#4) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/4
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/4/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/4/src/soc/mediatek/mt8192/ssp... PS4, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
Yidi Lin has uploaded a new patch set (#5) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/5
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/6/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/6/src/soc/mediatek/mt8192/ssp... PS6, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/7/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/7/src/soc/mediatek/mt8192/ssp... PS7, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
Yidi Lin has uploaded a new patch set (#8) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/8
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/8/src/soc/mediatek/mt8192/ssp... File src/soc/mediatek/mt8192/sspm.c:
https://review.coreboot.org/c/coreboot/+/47786/8/src/soc/mediatek/mt8192/ssp... PS8, Line 11: if (load_blob_file(sspm_file_name, SSPM_SRAM_BASE) == CB_SUCCESS) { braces {} are not necessary for single statement blocks
Yidi Lin has uploaded a new patch set (#9) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 42 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/9
Yidi Lin has uploaded a new patch set (#10) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 5 files changed, 42 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/10
Yidi Lin has uploaded a new patch set (#11) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 43 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/11
Yidi Lin has uploaded a new patch set (#12) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 43 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/12
Yidi Lin has uploaded a new patch set (#13) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 53 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/13
Yidi Lin has uploaded a new patch set (#14) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 53 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/14
Yidi Lin has uploaded a new patch set (#15) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 53 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/15
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/15/src/soc/mediatek/mt8192/Ma... File src/soc/mediatek/mt8192/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47786/15/src/soc/mediatek/mt8192/Ma... PS15, Line 60: $(CONFIG_SPM_FIRMWARE) \ : $(CONFIG_SSPM_FIRMWARE) nit: I don't think it's very important to do file name sorting here, so it is fine to add SSPM before SPM (so not changing two lines).
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 15: Code-Review+1
Yidi Lin has uploaded a new patch set (#16) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/16
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/15/src/soc/mediatek/mt8192/Ma... File src/soc/mediatek/mt8192/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47786/15/src/soc/mediatek/mt8192/Ma... PS15, Line 60: $(CONFIG_SPM_FIRMWARE) \ : $(CONFIG_SSPM_FIRMWARE)
nit: I don't think it's very important to do file name sorting here, so it is fine to add SSPM befor […]
revised
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 16: Code-Review+2
Yidi Lin has uploaded a new patch set (#17) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/17
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 17: Code-Review+2
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... PS17, Line 19: sspm_init(); a minor question: how do we decide if the various mcu init should be in mainboard.c or soc.c?
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... PS17, Line 19: sspm_init();
a minor question: how do we decide if the various mcu init should be in mainboard.c or soc. […]
Discussed with CK, they should be all related to SOC initialization flow. I will move those init to soc.c.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
Patch Set 18:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... File src/soc/mediatek/mt8192/soc.c:
https://review.coreboot.org/c/coreboot/+/47786/17/src/soc/mediatek/mt8192/so... PS17, Line 19: sspm_init();
Discussed with CK, they should be all related to SOC initialization flow. […]
you can do that as a follow up.
Yidi Lin has uploaded a new patch set (#19) to the change originally created by tinghan shen. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 52 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/47786/19
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47786 )
Change subject: soc/mediatek/mt8192: Init SSPM ......................................................................
soc/mediatek/mt8192: Init SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable.
Signed-off-by: TingHan.Shen tinghan.shen@mediatek.com Change-Id: Ia834852af50e9e7e1b1222ed1e2be20e43139c62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47786 Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8192/Kconfig M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/sspm.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/sspm.c 6 files changed, 52 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig index 67e5a52..7373fe1 100644 --- a/src/soc/mediatek/mt8192/Kconfig +++ b/src/soc/mediatek/mt8192/Kconfig @@ -69,4 +69,10 @@ help The file name of the MediaTek SPM firmware.
+config SSPM_FIRMWARE + string + default "sspm.bin" + help + The file name of the MediaTek SSPM firmware. + endif diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index c02eabc..bd6fe27 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -46,6 +46,7 @@ ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += soc.c ramstage-y += spm.c +ramstage-y += sspm.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/usb.c usb.c @@ -56,6 +57,7 @@ $(CONFIG_DPM_DM_FIRMWARE) \ $(CONFIG_DPM_PM_FIRMWARE) \ $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) \ $(CONFIG_SPM_FIRMWARE)
$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 2e8ac9e..8297129 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -27,6 +27,8 @@ PMIF_SPMI_BASE = IO_PHYS + 0x00027000, PMICSPI_MST_BASE = IO_PHYS + 0x00028000, SPMI_MST_BASE = IO_PHYS + 0x00029000, + SSPM_SRAM_BASE = IO_PHYS + 0x00400000, + SSPM_CFG_BASE = IO_PHYS + 0x00440000, DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000, DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000, DPM_CFG_BASE = IO_PHYS + 0x00940000, diff --git a/src/soc/mediatek/mt8192/include/soc/sspm.h b/src/soc/mediatek/mt8192/include/soc/sspm.h new file mode 100644 index 0000000..5749fa4 --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/sspm.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_SSPM_H +#define SOC_MEDIATEK_MT8192_SSPM_H + +#include <soc/addressmap.h> +#include <types.h> + +struct mt8192_sspm_regs { + u32 sw_rstn; +}; +static struct mt8192_sspm_regs *const mt8192_sspm = (void *)SSPM_CFG_BASE; +void sspm_init(void); +#endif /* SOC_MEDIATEK_MT8192_SSPM_H */ diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index 00a57d2..bf9e8e7 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -4,6 +4,7 @@ #include <soc/emi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/sspm.h> #include <symbols.h>
static void soc_read_resources(struct device *dev) @@ -15,6 +16,7 @@ { mtk_mmu_disable_l2c_sram(); mcupm_init(); + sspm_init(); }
static struct device_operations soc_ops = { diff --git a/src/soc/mediatek/mt8192/sspm.c b/src/soc/mediatek/mt8192/sspm.c new file mode 100644 index 0000000..b36e0df --- /dev/null +++ b/src/soc/mediatek/mt8192/sspm.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/mmio.h> +#include <soc/mcu_common.h> +#include <soc/sspm.h> +#include <soc/symbols.h> + +static void reset_sspm(struct mtk_mcu *mcu) +{ + write32(&mt8192_sspm->sw_rstn, 0x1); +} + +static struct mtk_mcu sspm = { + .firmware_name = CONFIG_SSPM_FIRMWARE, + .run_address = (void *)SSPM_SRAM_BASE, + .reset = reset_sspm, +}; + +void sspm_init(void) +{ + sspm.load_buffer = _dram_dma; + sspm.buffer_size = REGION_SIZE(dram_dma); + + mtk_init_mcu(&sspm); +}
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