Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31306 )
Change subject: device/pci_ops: Apply some symmetry in headers ......................................................................
device/pci_ops: Apply some symmetry in headers
To make PCI driver side arch-agnostic, function declarations have to be in symmetrical header file locations.
From the driver side, the correct file to include is now <device/pci_ops.h>
Change-Id: I8076a4867fd7472beaae0a021dcf0d9c7c905871 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/31306 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/arch/x86/include/arch/io.h M src/arch/x86/include/arch/pci_io_cfg.h M src/arch/x86/include/arch/pci_ops.h M src/device/pci_early.c M src/include/device/pci_mmio_cfg.h 5 files changed, 91 insertions(+), 58 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aaron Durbin: Looks good to me, approved
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index a2ba776..20338e0 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -203,67 +203,14 @@ } #endif
+/* FIXME: We should avoid this indirect include. Also this has to + * appear here after all MMIO and IO read/write functions. */ +#include <arch/pci_ops.h> + #ifdef __SIMPLE_DEVICE__
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-#include <arch/pci_io_cfg.h> -#include <device/pci_mmio_cfg.h> - -static __always_inline -uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config8(dev, where); - else - return pci_io_read_config8(dev, where); -} - -static __always_inline -uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config16(dev, where); - else - return pci_io_read_config16(dev, where); -} - -static __always_inline -uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - return pci_mmio_read_config32(dev, where); - else - return pci_io_read_config32(dev, where); -} - -static __always_inline -void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config8(dev, where, value); - else - pci_io_write_config8(dev, where, value); -} - -static __always_inline -void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config16(dev, where, value); - else - pci_io_write_config16(dev, where, value); -} - -static __always_inline -void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) -{ - if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) - pci_mmio_write_config32(dev, where, value); - else - pci_io_write_config32(dev, where, value); -} - /* Generic functions for pnp devices */ static __always_inline void pnp_write_config( pnp_devfn_t dev, uint8_t reg, uint8_t value) diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index ddc62ed..d02e640 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -14,7 +14,9 @@ #ifndef _PCI_IO_CFG_H #define _PCI_IO_CFG_H
+#include <stdint.h> #include <arch/io.h> +#include <device/pci_type.h>
static __always_inline unsigned int pci_io_encode_addr(pci_devfn_t dev, unsigned int where) @@ -75,4 +77,44 @@ outl(value, 0xCFC); }
+#if !IS_ENABLED(CONFIG_MMCONF_SUPPORT) +#ifdef __SIMPLE_DEVICE__ +static __always_inline +uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config8(dev, where); +} + +static __always_inline +uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config16(dev, where); +} + +static __always_inline +uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) +{ + return pci_io_read_config32(dev, where); +} + +static __always_inline +void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +{ + pci_io_write_config8(dev, where, value); +} + +static __always_inline +void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +{ + pci_io_write_config16(dev, where, value); +} + +static __always_inline +void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +{ + pci_io_write_config32(dev, where, value); +} +#endif /* __SIMPLE_DEVICE__ */ +#endif + #endif /* _PCI_IO_CFG_H */ diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h index 3f1515e..67633f4 100644 --- a/src/arch/x86/include/arch/pci_ops.h +++ b/src/arch/x86/include/arch/pci_ops.h @@ -14,6 +14,9 @@ #ifndef ARCH_I386_PCI_OPS_H #define ARCH_I386_PCI_OPS_H
+#include <arch/pci_io_cfg.h> +#include <device/pci_mmio_cfg.h> + #ifndef __SIMPLE_DEVICE__
extern const struct pci_bus_operations pci_cf8_conf1; diff --git a/src/device/pci_early.c b/src/device/pci_early.c index ea2ebd5..5a1fb22 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -15,7 +15,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ops.h> diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index 2e2c19a..0545001 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -70,4 +70,46 @@ write32(addr, value); }
+#if IS_ENABLED(CONFIG_MMCONF_SUPPORT) + +#ifdef __SIMPLE_DEVICE__ +static __always_inline +uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config8(dev, where); +} + +static __always_inline +uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config16(dev, where); +} + +static __always_inline +uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where) +{ + return pci_mmio_read_config32(dev, where); +} + +static __always_inline +void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +{ + pci_mmio_write_config8(dev, where, value); +} + +static __always_inline +void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +{ + pci_mmio_write_config16(dev, where, value); +} + +static __always_inline +void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +{ + pci_mmio_write_config32(dev, where, value); +} +#endif /* __SIMPLE_DEVICE__ */ + +#endif + #endif /* _PCI_MMIO_CFG_H */