Change in coreboot[master]: cpu/intel/sandybridge: Add `hyper_threading` option

[Tristan Corrick (Code Review)]

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/29669 )

Change subject: cpu/intel/sandybridge: Add `hyper_threading` option
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Patch Set 1:

I've tested this on a P8H61-M LX with an i3-2100. The sibling CPUs are
indeed disabled and `/sys/devices/system/cpu/smt/control` reports that
SMT is "notsupported".

However, coreboot still tries to initialise the sibling CPUs during
`intel_cores_init()`. The attempts fail but it increases boot time by
one second per disabled core.

Also, the ACPI Processor objects are not generated correctly when SMT is
disabled. With the current cpu init, `generate_cpu_entries()` reports 0
CPUs with 4 cores, generating nothing, but Linux seems to run fine. If
the parallel MP init patch for model_206ax is applied, it does generate
the ACPI objects, but includes the disabled cores. Linux notes "acpi
LNXCPU:02: BIOS reported wrong ACPI id 1 for the processor", "smpboot:
do_boot_cpu failed(-1) to wakeup CPU#2", and runs extremely slowly.