Patch set updated for coreboot: f3859fe AMD K8 boards’ `romstage.c`: Spell sync*hr*onize correctly

[Alexandru Gagniuc]

Alexandru Gagniuc ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5101

-gerrit

commit f3859fe373827e779ffa1f9a02140dc3100322cb
Author: Paul Menzel 
Date:   Sun Feb 2 22:05:48 2014 +0100

AMD K8 boards’ `romstage.c`: Spell sync*hr*onize correctly

Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08
    Signed-off-by: Paul Menzel 
---
 src/mainboard/amd/serengeti_cheetah/romstage.c  | 2 +-
 src/mainboard/asus/m2n-e/romstage.c             | 2 +-
 src/mainboard/gigabyte/ga_2761gxdk/romstage.c   | 2 +-
 src/mainboard/gigabyte/m57sli/romstage.c        | 2 +-
 src/mainboard/hp/dl145_g3/romstage.c            | 2 +-
 src/mainboard/hp/dl165_g6_fam10/romstage.c      | 2 +-
 src/mainboard/iwill/dk8_htx/romstage.c          | 2 +-
 src/mainboard/iwill/dk8s2/romstage.c            | 2 +-
 src/mainboard/iwill/dk8x/romstage.c             | 2 +-
 src/mainboard/msi/ms7260/romstage.c             | 2 +-
 src/mainboard/msi/ms9185/romstage.c             | 2 +-
 src/mainboard/msi/ms9282/romstage.c             | 2 +-
 src/mainboard/msi/ms9652_fam10/romstage.c       | 2 +-
 src/mainboard/nvidia/l1_2pvv/romstage.c         | 2 +-
 src/mainboard/supermicro/h8dme/romstage.c       | 2 +-
 src/mainboard/supermicro/h8dmr/romstage.c       | 2 +-
 src/mainboard/supermicro/h8dmr_fam10/romstage.c | 2 +-
 src/mainboard/supermicro/h8qme_fam10/romstage.c | 2 +-
 src/mainboard/tyan/s2912/romstage.c             | 2 +-
 src/mainboard/tyan/s2912_fam10/romstage.c       | 2 +-
 20 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index d00779d..7da7925 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -197,7 +197,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-//        init_timer(); // Need to use TMICT to synconize FID/VID
+//        init_timer(); // Need to use TMICT to synchronize FID/VID

sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index aba3758..4391aa0 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -138,7 +138,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

/* TODO: FIDVID */

-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

needs_reset |= optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 2cd2a88..d6f091b 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-//        init_timer(); // Need to use TMICT to synconize FID/VID
+//        init_timer(); // Need to use TMICT to synchronize FID/VID

sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index ebfe2a8..c4ce8c6 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -181,7 +181,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

needs_reset |= optimize_link_coherent_ht();
         needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index cb83c08..31f523f 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -205,7 +205,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
    /* all ap stopped? */
-	// init_timer(); // Need to use TMICT to synconize FID/VID
+	// init_timer(); // Need to use TMICT to synchronize FID/VID

sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 335c06b..d7e8447 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -200,7 +200,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
    /* all ap stopped? */
-//	init_timer(); // Need to use TMICT to synconize FID/VID
+//	init_timer(); // Need to use TMICT to synchronize FID/VID

printk(BIOS_DEBUG, "raminit_amdmct()\n");
    raminit_amdmct(sysinfo);
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 829f6c8..9b5b38d 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-        init_timer(); // Need to use TMICT to synconize FID/VID
+        init_timer(); // Need to use TMICT to synchronize FID/VID
    sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

#if 0
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index abbde20..601c649 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-        init_timer(); // Need to use TMICT to synconize FID/VID
+        init_timer(); // Need to use TMICT to synchronize FID/VID
    sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

#if 0
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index e160fdf..273e9f1 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-        init_timer(); // Need to use TMICT to synconize FID/VID
+        init_timer(); // Need to use TMICT to synchronize FID/VID
    sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

#if 0
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index d2e761a..e1fef43 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    }
 #endif

-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

needs_reset |= optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index e86cb85..c1faab5 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

//do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-//        init_timer(); // Need to use TMICT to synconize FID/VID
+//        init_timer(); // Need to use TMICT to synchronize FID/VID

sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);

diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index fc54251..98aacf2 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 #endif
    ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn

-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

needs_reset = optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index cdeaf7b..45f05a5 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -203,7 +203,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    msr=rdmsr(0xc0010071);
    printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
 #endif
-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

wants_reset = mcp55_early_setup_x();

diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 785b52f..ab0f1dd 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    }
 #endif

-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

needs_reset |= optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 3edd093..ef78450 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    }
 #endif

-	init_timer(); /* Need to use TMICT to synconize FID/VID. */
+	init_timer(); /* Need to use TMICT to synchronize FID/VID. */

needs_reset |= optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 1675427..e87b845 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -162,7 +162,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

needs_reset |= optimize_link_coherent_ht();
         needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index d185653..bc1ca24 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
           msr.hi, msr.lo);
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

wants_reset = mcp55_early_setup_x();

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 72ca8b6..2be09bc 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -263,7 +263,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
  printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

wants_reset = mcp55_early_setup_x();

diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 80430cb..07f9efd 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    }
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

needs_reset |= optimize_link_coherent_ht();
    needs_reset |= optimize_link_incoherent_ht(sysinfo);
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 2a9c2a4..74c0aaa 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
 #endif

-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID

wants_reset = mcp55_early_setup_x();