Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50334 )
Change subject: soc/amd/cezanne/pcie_gpp: scan internal PCI buses
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Patch Set 3:
(1 comment)
File src/soc/amd/cezanne/pcie_gpp.c:
https://review.coreboot.org/c/coreboot/+/50334/comment/5dad21dc_20b3a7f3
PS3, Line 16: 17H
Do we need a new id?
that id is used in renoir and cezanne and i just used the first family/model name a pci id was used. apart from the core complex renoir and cezanne are pretty much the same. you can re-check what got added in https://review.coreboot.org/c/coreboot/+/47703/5/src/include/device/pci_ids.... but i think i double-checked
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