Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31305
Change subject: device/pci_ops: Move common pci_mmio_cfg.h ......................................................................
device/pci_ops: Move common pci_mmio_cfg.h
It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic.
Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/arch/x86/include/arch/io.h R src/include/device/pci_mmio_cfg.h 2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/31305/1
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 4b4a178..a2ba776 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -208,7 +208,7 @@ #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h> -#include <arch/pci_mmio_cfg.h> +#include <device/pci_mmio_cfg.h>
static __always_inline uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h similarity index 97% rename from src/arch/x86/include/arch/pci_mmio_cfg.h rename to src/include/device/pci_mmio_cfg.h index c660ed5..2e2c19a 100644 --- a/src/arch/x86/include/arch/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -16,7 +16,9 @@ #ifndef _PCI_MMIO_CFG_H #define _PCI_MMIO_CFG_H
+#include <stdint.h> #include <arch/io.h> +#include <device/pci_type.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31305 )
Change subject: device/pci_ops: Move common pci_mmio_cfg.h ......................................................................
Patch Set 2: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31305 )
Change subject: device/pci_ops: Move common pci_mmio_cfg.h ......................................................................
Patch Set 2: Code-Review+1
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31305 )
Change subject: device/pci_ops: Move common pci_mmio_cfg.h ......................................................................
Patch Set 2: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31305 )
Change subject: device/pci_ops: Move common pci_mmio_cfg.h ......................................................................
device/pci_ops: Move common pci_mmio_cfg.h
It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic.
Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/31305 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/arch/x86/include/arch/io.h R src/include/device/pci_mmio_cfg.h 2 files changed, 3 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aaron Durbin: Looks good to me, approved Arthur Heymans: Looks good to me, approved
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 4b4a178..a2ba776 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -208,7 +208,7 @@ #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h> -#include <arch/pci_mmio_cfg.h> +#include <device/pci_mmio_cfg.h>
static __always_inline uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h similarity index 97% rename from src/arch/x86/include/arch/pci_mmio_cfg.h rename to src/include/device/pci_mmio_cfg.h index c660ed5..2e2c19a 100644 --- a/src/arch/x86/include/arch/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -16,7 +16,9 @@ #ifndef _PCI_MMIO_CFG_H #define _PCI_MMIO_CFG_H
+#include <stdint.h> #include <arch/io.h> +#include <device/pci_type.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
-
Aaron Durbin (Code Review) -
Arthur Heymans (Code Review)
-
Kyösti Mälkki (Code Review)
-
Paul Menzel (Code Review)