Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86259?usp=email )
Change subject: soc/intel/alderlake: Add missing min sleep state for SMBUS device ......................................................................
soc/intel/alderlake: Add missing min sleep state for SMBUS device
Fixes: Unknown min d_state for PCI: 00:1f.4
Change-Id: I8050c8d574ea5908d5ad3f1e5a034257fabb72c5 Signed-off-by: Brandon Weeks bweeks@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/86259 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com --- M src/soc/intel/alderlake/acpi.c 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index 463112f..4c5a515 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -217,6 +217,7 @@ { PCH_DEVFN_ESPI, ACPI_DEVICE_SLEEP_D0 }, { PCH_DEVFN_PMC, ACPI_DEVICE_SLEEP_D0 }, { PCH_DEVFN_HDA, ACPI_DEVICE_SLEEP_D0 }, + { PCH_DEVFN_SMBUS, ACPI_DEVICE_SLEEP_D0 }, { PCH_DEVFN_SPI, ACPI_DEVICE_SLEEP_D3 }, { PCH_DEVFN_GBE, ACPI_DEVICE_SLEEP_D3 }, };