Change in ...coreboot[master]: soc/intel/cannonlake: Enable all C states in FSP

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32463

Change subject: soc/intel/cannonlake: Enable all C states in FSP
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soc/intel/cannonlake: Enable all C states in FSP

FSP will not enable all C-states by default when we use FSP to do MP
initialization. We need to set UPD from coreboot to enable C-states in
FSP.

Change-Id: I845c61fd14f2f5de21288067eeb7c371710da249
Signed-off-by: Maulik V Vaghela 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/32463/1

diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 2b83275..7b28058 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -352,6 +352,9 @@

/* Unlock all GPIO pads */
    tconfig->PchUnlockGpioPads = config->PchUnlockGpioPads;
+
+	/* Enable all Cx state in FSP */
+	tconfig->Cx = 1;
 }

/* Mainboard GPIO Configuration */

Change in coreboot[master]: soc/intel/cannonlake: Enable all C states in FSP

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32463 )

Change subject: soc/intel/cannonlake: Enable all C states in FSP
......................................................................

Abandoned