[XS] Change in coreboot[main]: mb/google/nissa/var/craask: Modify eMMC DLL tuning value

[David Wu (Code Review)]

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86395?usp=email )

Change subject: mb/google/nissa/var/craask: Modify eMMC DLL tuning value
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mb/google/nissa/var/craask: Modify eMMC DLL tuning value

Craask cannot boot into OS from 2nd source eMMC.
Update eMMC DLL tuning value to improve initialization reliability

BUG=b:375497774
TEST=Cold reboot stress test over 2500 cycles

Change-Id: I415beb84ac09f8c3e80c3df12bc323a06baf812d
Signed-off-by: David Wu 
---
M src/mainboard/google/brya/variants/craask/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/86395/1

diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb
index 069deb3..ee8a63d 100644
--- a/src/mainboard/google/brya/variants/craask/overridetree.cb
+++ b/src/mainboard/google/brya/variants/craask/overridetree.cb
@@ -70,7 +70,7 @@
    # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
    # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
    # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
-	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F3C"
+	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"

# EMMC RX CMD/DATA Delay 2
    # Refer to EDS-Vol2-42.3.12.