[M] Change in coreboot[master]: soc/intel/cmn/tom: Cache TOM region early

[Subrata Banik (Code Review)]

Attention is currently required from: Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73272 )

Change subject: soc/intel/cmn/tom: Cache TOM region early
......................................................................

Patch Set 2:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/73272/comment/d39ade98_26223c73 
PS1, Line 7: soc/intel/cmn/tom: Early caching of TOM region
> Please make it a statement: Cache TOM region early

Ack

https://review.coreboot.org/c/coreboot/+/73272/comment/e14682df_7646f964 
PS1, Line 12:
> Why is determining TOM take 50 ms? Please elaborate in the commit message.

please read the line between 13-19, that explains why we are seeing 50ms savings (FSP-M and late romstage uses this
uncached TOM range for various purposes). Sorry! I don't know how to make more elaborative commit msg.