Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48780 )
Change subject: soc/intel/{icl,tgl,adl,ehl,jsl}: move UART pad config to boards ......................................................................
Patch Set 4:
Patch Set 3:
Patch Set 3:
Patch Set 1:
(1 comment)
Patch Set 1:
How do you know which boards have multiple UARTs? Removing the common code will make it impossible to use them when changing the UART_FOR_CONSOLE kconfig.
That's not true; the boards just have to configure the pads for all UARTs correctly
How do you prove that this change doesn't introduce regressions without having access to all board schematics?
That's why we have a review system, right?
So, this is how I checked the uarts; ofc the maintainers should check this. As I said, that's what gerrit is made for :-)
volteer: C8/C9 marked as uart rx/tx for all variants; the other UARTs are NC or used differently dedede: C20/C21 marked as debug uart; others used differently / NC
adlrvp: - UART1 and UART2 are NF1 in late gpio -> can be assumed to work (maintainer should check NC) - UART0 is unknown, but Kconfig has UART_FOR_CONSOLE=0 (if that shall mean "disabled" then this is the first occurrence, where a short-circuit could be present already....) -> maintainer should check this
elkhartlake_crb: - UART_FOR_CONSOLE=2 if INTEL_LPSS_UART_FOR_CONSOLE -> UART2 - no other gpios are configured yet - -> maintainer should check this
icelake_rvp/icl_u: - UART_FOR_CONSOLE=2 -> UART2 - C12/C13 have different use - C8/C9 missing
icelake_rvp/icl_y: - UART_FOR_CONSOLE=2 -> UART2 - C12/C13 have different use - C8 has different use
elkhartlake_crb: - UART_FOR_CONSOLE=2 if INTEL_LPSS_UART_FOR_CONSOLE -> UART2 - C12/C13, C8/C9 missing completely -> maintainer should check
This assumes, that gpio config and UART_FOR_CONSOLE are correct, but that's something the maintainers should check anyways.