[XS] Change in coreboot[main]: soc/intel/xeon_sp/cpx: Fix register lock

[Patrick Rudolph (Code Review)]

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.

Hello Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85439?usp=email

to look at the new patch set (#3).

The following approvals got outdated and were removed:
Code-Review+1 by Angel Pons, Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp/cpx: Fix register lock
......................................................................

soc/intel/xeon_sp/cpx: Fix register lock

Do not use a define for a PCI register to lock a MSR.

The defines will be moved in the following commit to it's own header,
preventing the use in CPX CPU init.

Change-Id: I76a8ae13dbd942291aacbb4bd84140be156bc563
Signed-off-by: Patrick Rudolph 
---
M src/soc/intel/xeon_sp/cpx/cpu.c
1 file changed, 1 insertion(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/85439/3