[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84957?usp=email )

Change subject: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO
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mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO

This patch configures the ESPI_SOC_ALERT_L GPIO pad on fatcat as
NC to enable S0ix low power entry.

TEST=Build fatcat and check the platform boots without an issue.

Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f
Signed-off-by: Sukumar Ghorai 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84957
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
Reviewed-by: Jamie Ryu 
---
M src/mainboard/google/fatcat/variants/fatcat/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Subrata Banik: Looks good to me, approved
  build bot (Jenkins): Verified
  Jamie Ryu: Looks good to me, approved

diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
index ca59446..b76db5a 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
@@ -100,7 +100,7 @@
    /* GPP_B23:     ISH_GP_6_SNSR_HDR */
    PAD_CFG_NF(GPP_B23, NONE, DEEP, NF4),
    /* GPP_B24:     ESPI_ALERT0_EC_R_N */
-	PAD_CFG_NF(GPP_B24, NONE, DEEP, NF1),
+	PAD_NC(GPP_B24, NONE),
    /* GPP_B25:     X1_SLOT_WAKE_N */
    PAD_CFG_GPI_SCI_LOW(GPP_B25, NONE, DEEP, LEVEL),