Kane Chen has uploaded this change for review. ( https://review.coreboot.org/29354
Change subject: soc/intel/apollolake: Interface for updating Tcc in mainboard ......................................................................
soc/intel/apollolake: Interface for updating Tcc in mainboard
This change provides an interface for mainboard to set Tcc before BIOS reset complete happens in romstage.
With this change, we can add code to update Tcc in mainboard or variants.
BUG=b:117789732
Change-Id: I287ba2b0001f0bef0b7a0d85b33f7d2df127f2db Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/apollolake/include/soc/romstage.h M src/soc/intel/apollolake/romstage.c 2 files changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/29354/1
diff --git a/src/soc/intel/apollolake/include/soc/romstage.h b/src/soc/intel/apollolake/include/soc/romstage.h index fe3add6..4a97826 100644 --- a/src/soc/intel/apollolake/include/soc/romstage.h +++ b/src/soc/intel/apollolake/include/soc/romstage.h @@ -24,5 +24,6 @@ void set_max_freq(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void mainboard_save_dimm_info(void); +void mainboard_update_tcc(void);
#endif /* _SOC_APOLLOLAKE_ROMSTAGE_H_ */ diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index d2ec6c1..6980032 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -52,6 +52,7 @@ #include <timer.h> #include <delay.h> #include "chip.h" +#include <baseboard/variants.h>
static const uint8_t hob_variable_guid[16] = { 0x7d, 0x14, 0x34, 0xa0, 0x0c, 0x69, 0x54, 0x41, @@ -198,6 +199,9 @@ s3wake = pmc_fill_power_state(ps) == ACPI_S3; fsp_memory_init(s3wake);
+ /* Set Tcc before BIOS Reset Complete */ + mainboard_update_tcc(); + if (punit_init()) set_max_freq(); else @@ -397,3 +401,8 @@ { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); } + +void __weak mainboard_update_tcc(void) +{ + /* Place holder for updating Tcc. */ +}