Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
soc/intel/xeon_sp/acpi: Add pch.asl
Add ASL for the PCH. Initially, this only contains soc/intel/common/block/acpi/acpi/lpc.asl. Additional PCH ASL may be added in the future.
Change-Id: I70cb790355430f63f25e0dbc9fccc22462fe3572 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- A src/soc/intel/xeon_sp/acpi/pch.asl 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/45836/1
diff --git a/src/soc/intel/xeon_sp/acpi/pch.asl b/src/soc/intel/xeon_sp/acpi/pch.asl new file mode 100644 index 0000000..98a5fdd --- /dev/null +++ b/src/soc/intel/xeon_sp/acpi/pch.asl @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* This file should be included in the proper platform ACPI _SB PCI scope */ + +/* LPC 0:1f.0 */ +#include <soc/intel/common/block/acpi/acpi/lpc.asl>
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
Patch Set 3: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45836/3/src/soc/intel/xeon_sp/acpi/... File src/soc/intel/xeon_sp/acpi/pch.asl:
PS3: I only gave a +1 because I didn't see where this file is going to be included, even after looking ahead of the patch train.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45836/3/src/soc/intel/xeon_sp/acpi/... File src/soc/intel/xeon_sp/acpi/pch.asl:
PS3:
I only gave a +1 because I didn't see where this file is going to be included, even after looking ah […]
It will be later and is a mainboard dsdt.asl change. I've waited on changing the mainboards.
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
Patch Set 9: Code-Review+2
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45836/3/src/soc/intel/xeon_sp/acpi/... File src/soc/intel/xeon_sp/acpi/pch.asl:
PS3:
It will be later and is a mainboard dsdt.asl change. I've waited on changing the mainboards.
Ack
Marc Jones has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45836 )
Change subject: soc/intel/xeon_sp/acpi: Add pch.asl ......................................................................
soc/intel/xeon_sp/acpi: Add pch.asl
Add ASL for the PCH. Initially, this only contains soc/intel/common/block/acpi/acpi/lpc.asl. Additional PCH ASL may be added in the future.
Change-Id: I70cb790355430f63f25e0dbc9fccc22462fe3572 Signed-off-by: Marc Jones marcjones@sysproconsulting.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45836 Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A src/soc/intel/xeon_sp/acpi/pch.asl 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/xeon_sp/acpi/pch.asl b/src/soc/intel/xeon_sp/acpi/pch.asl new file mode 100644 index 0000000..98a5fdd --- /dev/null +++ b/src/soc/intel/xeon_sp/acpi/pch.asl @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* This file should be included in the proper platform ACPI _SB PCI scope */ + +/* LPC 0:1f.0 */ +#include <soc/intel/common/block/acpi/acpi/lpc.asl>
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Angel Pons (Code Review) -
Marc Jones (Code Review)
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Stefan Reinauer (Code Review)