Change in coreboot[master]: soc/amd/cezanne/fch: disable 48MHz output in S0i3 - coreboot-gerrit

17 Dec 2021


      Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60125 )
Change subject: soc/amd/cezanne/fch: disable 48MHz output in S0i3
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Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60125/comment/4c7b48d6_e19d4ebc 
PS1, Line 8:
...
Please add the motivation.
Done
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Gerrit-Project: coreboot
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Gerrit-Change-Id: If445f5825dc7b795c95d73c061156cc485421ada
Gerrit-Change-Number: 60125
Gerrit-PatchSet: 2
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