Attention is currently required from: Tarun Tuli, Eran Mitrani, Kapil Porwal, Nick Vaccaro.
Hello build bot (Jenkins), Tarun Tuli, Eran Mitrani, Subrata Banik, Nick Vaccaro, Eric Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70132
to look at the new patch set (#6).
Change subject: soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function ......................................................................
soc/intel/meteorlake: Refactor `pmc_lockdown_cfg` function
This patch refactors the `pmc_lockdown_cfg()` to remove the helper functions and uses the `setbits32` function to enforce bit locking as applicable.
This patch also locks PMC features like: 1. Debug mode configuration and host read access to PMC XRAM. 2. PMC soft strap message interface. 3. PMC static function. and then calls into the PMC IPC function that informs about PCI enumeration.
Port of - 1. commit 2eec87a553ec ("soc/intel/alderlake: Refactor `pmc_lockdown_cfg` function") 2. commit bae4a0b5a1e4 ("soc/intel/alderlake: Implement PMC feature lock") 3. commit c2570dc99800 ("soc/intel/alderlake: Implement PMC soft strap interface lock") 4. commit f021952c4067 ("soc/intel/alderlake: Implement PMC static function lock") 5. commit 457891415380 ("soc/intel/alderlake: Call into PMC IPC to inform PCI enumeration done")
BUG=none TEST=Boot to OS on google/rex.
Register values in OS - # busybox devmem 0xfe0018d4 32 #bit31 0x80000000 # busybox devmem 0xfe001024 32 #bit21,18,17,4 0x00362610 # busybox devmem 0xfe001818 32 #bit27,22 0x2B4F0004 # busybox devmem 0xfe00104c 32 #bit0 0x00000001
Signed-off-by: Kapil Porwal kapilporwal@google.com Change-Id: I3622748d8fecef69c60bb3fe9bfe68fc126764b7 --- M src/soc/intel/meteorlake/include/soc/pmc.h M src/soc/intel/meteorlake/lockdown.c 2 files changed, 69 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/70132/6