Change in coreboot[master]: src/mainboard/intel/glkrvp: Common code for ThunderPeak and Jefferson...

[Srinidhi N Kaushik (Code Review)]

Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/23787

Change subject: src/mainboard/intel/glkrvp: Common code for ThunderPeak and JeffersonPeak
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src/mainboard/intel/glkrvp: Common code for ThunderPeak and JeffersonPeak

This changeset will include common code for
Thunderpeak and Jeffersonpeak based on auto detect.

Change-Id: I875bb655b6ae87660b87a45fa52caf79f6e0d753
Signed-off-by: Srinidhi N Kaushik 
---
M src/mainboard/intel/glkrvp/mainboard.c
M src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
M src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
4 files changed, 55 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/23787/1

diff --git a/src/mainboard/intel/glkrvp/mainboard.c b/src/mainboard/intel/glkrvp/mainboard.c
index ac5e973..ab855e0 100644
--- a/src/mainboard/intel/glkrvp/mainboard.c
+++ b/src/mainboard/intel/glkrvp/mainboard.c
@@ -38,6 +38,12 @@
    pads = variant_gpio_table(&num);
    gpio_configure_pads(pads, num);

+	/* Separate gpio table for cnvi bases wifi
+	 * Will be adding one more table for pcie
+	 * based wifi */
+	pads = variant_cnvi_wifi_gpio_table(&num);
+	gpio_configure_pads(pads, num);
+
    mainboard_ec_init();
 }

diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 4b93947..5a83d47 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -9,13 +9,13 @@
    register "pcie_rp1_clkreq_pin" = "3" # wifi/bt
    register "pcie_rp2_clkreq_pin" = "CLKREQ_DISABLED"
    register "pcie_rp3_clkreq_pin" = "CLKREQ_DISABLED"
-	register "pcie_rp4_clkreq_pin" = "1"
+	register "pcie_rp4_clkreq_pin" = "CLKREQ_DISABLED"
    register "pcie_rp5_clkreq_pin" = "CLKREQ_DISABLED"

# GPIO for PERST_0
    # If the Board has PERST_0 signal, assign the GPIO
    # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
-	register "prt0_gpio" = "GPIO_PRT0_UDEF"
+	register "prt0_gpio" = "GPIO_163"

# GPIO for SD card detect
    register "sdcard_cd_gpio" = "GPIO_186"
@@ -115,9 +115,9 @@
    	device pci 12.0 on  end	# - SATA
    	device pci 13.0 off end	# - PCIe-A 0 Slot 1
    	device pci 13.1 off end	# - PCIe-A 1
-		device pci 13.2 on  end	# - PCIe-A 2 Onboard Lan
+		device pci 13.2 off end	# - PCIe-A 2 Onboard Lan
    	device pci 13.3 off end	# - PCIe-A 3
-		device pci 14.0 off end # - PCIe-B 0 Slot2
+		device pci 14.0 on  end # - PCIe-B 0 Slot2
    	device pci 14.1 on  end	# - PCIe-B 1 Onboard M2 Slot(Wifi/BT)
    	device pci 15.0 on  end	# - XHCI
    	device pci 15.1 off end # - XDCI
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
index 9014aa5..974f183 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
@@ -22,6 +22,49 @@
  * table found in EDS vol 1, but some pins aren't grouped functionally in
  * the table so those were moved for more logical grouping.
  */
+
+static const struct pad_config cnvi_wifi_gpio_table[] = {
+        PAD_CFG_NF(GPIO_21, UP_20K, DEEP, NF2), /* CNV_MFUART2_RXD */
+        PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE), /*CNV_MFUART2_TXD */
+        PAD_CFG_NF(GPIO_23, UP_20K, DEEP, NF2), /* CNV_GNSS_PABLANKIt */
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_27, UP_20K, DEEP, NF2, TxLASTRxE, DISPUPD),/*RF_KILL_WiFi/WiFi_Disable */
+        PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, DISPUPD),/* RF_KILL_BT/BT_Disable */
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1),/*CNV_BRI_DT*/
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1),/*CNV_BRI_RSP*/
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_193, NONE, DEEP, NF1),/*CNV_RGI_DT*/
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_194, UP_20K, DEEP, NF1),/*CNV_RGI_RSP*/
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_195, NONE, DEEP, NF1),/*CNV_RF_RESET_B*/
+	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_196, NONE, DEEP, NF1),/*XTAL_CLKREQ*/
+};
+
+const struct pad_config * __attribute__((weak))
+variant_cnvi_wifi_gpio_table(size_t *num)
+{
+	*num = ARRAY_SIZE(cnvi_wifi_gpio_table);
+	return cnvi_wifi_gpio_table;
+}
+
+static const struct pad_config pcie_wifi_gpio_table[] = {
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_21, 1, DEEP, UP_20K, TxLASTRxE, ENPU),/*CNV_BRI_DT*/
+        PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_22, 1, DEEP, UP_20K, TxDRxE, ENPU),/*CNV_BRI_DT*/
+        PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_23, 1, DEEP, UP_20K, TxLASTRxE, ENPU),/*CNV_BRI_DT*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_27, 1, DEEP, NONE, IGNORE, DISPUPD),/*RF_KILL_WiFi/WiFi_Disable */
+        PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, ENPU),/* RF_KILL_BT/BT_Disable */
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_191, 1, DEEP, NONE, IGNORE, SAME),/*CNV_BRI_DT*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_192, 1, DEEP, UP_20K, IGNORE, ENPU ),/*CNV_BRI_RSP*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_193, 1, DEEP, NONE, IGNORE, SAME),/*CNV_RGI_DT*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_194, 1, DEEP, UP_20K, IGNORE, ENPU),/*CNV_RGI_RSP*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_195, 1, DEEP, NONE, IGNORE, SAME),/*CNV_RF_RESET_B*/
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_196, 1, DEEP, NONE, IGNORE, SAME),/*XTAL_CLKREQ*/
+};
+
+const struct pad_config * __attribute__((weak))
+variant_pcie_wifi_gpio_table(size_t *num)
+{
+	*num = ARRAY_SIZE(pcie_wifi_gpio_table);
+	return pcie_wifi_gpio_table;
+}
+
 static const struct pad_config gpio_table[] = {
 /* NORTHWEST COMMUNITY GPIOS */
    PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_0, DN_20K, DEEP, NF1, IGNORE, ENPD), /* TCK */
@@ -45,14 +88,9 @@
    PAD_CFG_GPI_APIC_IOS(GPIO_18, UP_20K, DEEP, LEVEL, NONE, IGNORE, SAME),/* Touch Pad Interrupt */
    PAD_CFG_GPI_APIC_IOS(GPIO_19, UP_20K, DEEP, EDGE_SINGLE, NONE, TxDRxE, SAME),/*PMIC Interrupt*/
    PAD_CFG_GPI_APIC_IOS(GPIO_20, UP_20K, DEEP, LEVEL, INVERT, IGNORE, SAME),/* Audio Codec Interrupt*/
-	PAD_CFG_NF(GPIO_21, UP_20K, DEEP, NF2), /* CNV_MFUART2_RXD */
-	PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE), /* CNV_MFUART2_TXD */
-	PAD_CFG_NF(GPIO_23, UP_20K, DEEP, NF2), /* CNV_GNSS_PABLANKIt */
    PAD_CFG_GPO_GPIO_DRIVER(GPIO_24, 1, DEEP, DN_20K),
    PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_25, 1, DEEP, UP_20K, TxLASTRxE, SAME),/*WWAN /RF_KILL_GPS*/
    PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_26, UP_20K, DEEP, NF2, HIZCRx1, DISPUPD),/* NFC Interrupt */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_27, UP_20K, DEEP, NF2, TxLASTRxE, DISPUPD),/* RF_KILL_WiFi/WiFi_Disable */
-	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, DISPUPD),/* RF_KILL_BT/BT_Disable */
    PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_29, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),/* Codec Power Down: Ouput/ISH_GPIO_3*/
    PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_30, DN_20K, DEEP, NF1), /* ISH_GPIO_4 */
    PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_31, DN_20K, DEEP, NF1), /* ISH_GPIO_5 */
@@ -229,12 +267,6 @@
    PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_210, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),
    PAD_CFG_NF_IOSSTATE(GPIO_189, DN_20K, DEEP, NF1, HIZCRx0),/*OSC_CLK_OUT_0*/
    PAD_CFG_NF_IOSSTATE(GPIO_190, DN_20K, DEEP, NF1, HIZCRx0),/*OSC_CLK_OUT_1*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1),/*CNV_BRI_DT*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1),/*CNV_BRI_RSP*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_193, NONE, DEEP, NF1),/*CNV_RGI_DT*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_194, UP_20K, DEEP, NF1),/*CNV_RGI_RSP*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_195, NONE, DEEP, NF1),/*CNV_RF_RESET_B*/
-	PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_196, NONE, DEEP, NF1),/*XTAL_CLKREQ*/
    PAD_CFG_NF(GPIO_197, DN_20K, DEEP, NF1),/*SDIO_CLK_FB*/
    PAD_CFG_NF_IOSSTATE(GPIO_198, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_CLK*/
    PAD_CFG_NF(GPIO_199, DN_20K, DEEP, NF1),/*EMMC0_CLK_FB*/
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
index c278cde..62aa7a4 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/variants.h
@@ -29,6 +29,8 @@
 const struct pad_config *variant_gpio_table(size_t *num);
 const struct pad_config *variant_early_gpio_table(size_t *num);
 const struct pad_config *variant_sleep_gpio_table(size_t *num);
+const struct pad_config *variant_cnvi_wifi_gpio_table(size_t *num);
+const struct pad_config *variant_pcie_wifi_gpio_table(size_t *num);

/* Baseboard default swizzle. Can be reused if swizzle is same. */
 extern const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle;