[M] Change in coreboot[master]: soc/intel: Improve TCO accessors

[Werner Zeh (Code Review)]

Attention is currently required from: Tarun Tuli, Sean Rhodes, Subrata Banik, Kapil Porwal, Lean Sheng Tan, Kyösti Mälkki.

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70052 )

Change subject: soc/intel: Improve TCO accessors
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Patch Set 4:

(2 comments)

File src/soc/intel/common/pch/include/intelpch/smbus.h:

https://review.coreboot.org/c/coreboot/+/70052/comment/892dbfcd_6ca6bf0c 
PS4, Line 15: TCO_NO_REBOOT			(1 << 0)
From what I have got this bit is not common across all platforms (not defined for APL).

File src/soc/intel/elkhartlake/bootblock/bootblock.c:

https://review.coreboot.org/c/coreboot/+/70052/comment/1b853c78_51dccaf5 
PS4, Line 36: 	uint16_t reg = tco_read16(TCO1_CNT);
            : 		/* NO_REBOOT is enabled via bit 0 in TCO1_CNT. */
            : 		reg |= TCO_NO_REBOOT;
            : 		tco_write16(TCO1_CNT, reg);
This could be 
tco_setbits16(TCO1_CNT, TCO_NO_REBOOT);

already here as you have just defined this helpers in this commit.