Change in coreboot[master]: soc/amd/common/block/include/gpio_defs: remove unneeded line break

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59592 )

Change subject: soc/amd/common/block/include/gpio_defs: remove unneeded line break
......................................................................

soc/amd/common/block/include/gpio_defs: remove unneeded line break

The definitions of GPIO_INT_ENABLE_STATUS_DELIVERY and
GPIO_TIMEBASE_62440uS fit into 96 characters, so remove the unneeded
line breaks.

Signed-off-by: Felix Held 
Change-Id: I4b9c3885259b9acf0539eed14e23fbbb0deccea7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59592
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
---
M src/soc/amd/common/block/include/amdblocks/gpio_defs.h
1 file changed, 2 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
index 793e717..7ca1c00 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h
@@ -43,8 +43,7 @@

#define GPIO_INT_ENABLE_STATUS		(1 << 11)
 #define GPIO_INT_ENABLE_DELIVERY	(1 << 12)
-#define GPIO_INT_ENABLE_STATUS_DELIVERY	\
-				(GPIO_INT_ENABLE_STATUS | GPIO_INT_ENABLE_DELIVERY)
+#define GPIO_INT_ENABLE_STATUS_DELIVERY	(GPIO_INT_ENABLE_STATUS | GPIO_INT_ENABLE_DELIVERY)
 #define GPIO_INT_ENABLE_MASK		(3 << 11)

#define GPIO_S0I3_WAKE_EN	(1 << 13)
@@ -115,8 +114,7 @@
 #define GPIO_TIMEBASE_61uS		0
 #define GPIO_TIMEBASE_183uS		(1 << 4)
 #define GPIO_TIMEBASE_15560uS		(1 << 7)
-#define GPIO_TIMEBASE_62440uS		(GPIO_TIMEBASE_183uS | \
-					GPIO_TIMEBASE_15560uS)
+#define GPIO_TIMEBASE_62440uS		(GPIO_TIMEBASE_183uS | GPIO_TIMEBASE_15560uS)
 #define GPIO_DEB_DEBOUNCE_DISABLED	(0 | GPIO_TIMEBASE_61uS)
 #define GPIO_DEB_60uS			(1 | GPIO_TIMEBASE_61uS)
 #define GPIO_DEB_120uS			(2 | GPIO_TIMEBASE_61uS)