Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36749 )
Change subject: mb/siemens/mc_apl6: Enable VT-d feature ......................................................................
mb/siemens/mc_apl6: Enable VT-d feature
This mainboard needs VT-d to be enabled. Do so in devicetree.
Change-Id: I9f2f733163be019ac329660d7633b48c5d7896f1 Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/36749/1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index e12972c..3b52f65 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -14,6 +14,9 @@ register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
+ # Enable Vtd feature + register "enable_vtd" = "1" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36749 )
Change subject: mb/siemens/mc_apl6: Enable VT-d feature ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36749 )
Change subject: mb/siemens/mc_apl6: Enable VT-d feature ......................................................................
mb/siemens/mc_apl6: Enable VT-d feature
This mainboard needs VT-d to be enabled. Do so in devicetree.
Change-Id: I9f2f733163be019ac329660d7633b48c5d7896f1 Signed-off-by: Werner Zeh werner.zeh@siemens.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36749 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Mario Scheithauer: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index e12972c..3b52f65 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -14,6 +14,9 @@ register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
+ # Enable Vtd feature + register "enable_vtd" = "1" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF
-
Mario Scheithauer (Code Review) -
Patrick Georgi (Code Review)
-
Werner Zeh (Code Review)