[M] Change in coreboot[main]: drivers/wifi: Support Drive Strength BRI Rsp Table

[Jérémy Compostella (Code Review)]

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85017?usp=email )

Change subject: drivers/wifi: Support Drive Strength BRI Rsp Table
......................................................................

drivers/wifi: Support Drive Strength BRI Rsp Table

Drive Strength BRI Rsp Object provides information from the OEM
platforms if they have replaced the Bluetooth Radio Interface resistor
to overcome the potential STEP errors on their designs. Based on
configuration, CNV firmware shall adjust the BRI Rsp line drive
strength.

The bri_resistor_value is encoded as follow:

|  Bit | Val | Description                                 | Default |
|------+-----+---------------------------------------------+---------|
|    0 |   0 | Device FW default values                    |       1 |
|      |   1 | Override device FW default values           |         |
|  3:1 |   0 | Reserved (shall be set to 0)                |       0 |
|  7:4 |   0 | DSBR override values (only if bit 0 is set) |     0xf |
| 31:7 |   0 | Reserved (shall be set to 0)                |       0 |

Possible values:
- 0xf1 (default): indicates that the resistor on board is 33 Ohm
- 0x0 or 0xb1: indicates that the resistor on board is 10 Ohm

The implementation follows document 559910 Intel Connectivity
Platforms BIOS Guideline revision 9.2 specification.

BUG=b:346600091
TEST=DSBR methods are added to the wifi device and bluetooth companion
     device and they return the data supplied by the SAR binary blob

Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e300
Signed-off-by: Jeremy Compostella 
---
M src/drivers/wifi/generic/acpi.c
M src/include/sar.h
M src/vendorcode/google/chromeos/sar.c
3 files changed, 53 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/85017/1

diff --git a/src/drivers/wifi/generic/acpi.c b/src/drivers/wifi/generic/acpi.c
index ca80594..00de176 100644
--- a/src/drivers/wifi/generic/acpi.c
+++ b/src/drivers/wifi/generic/acpi.c
@@ -962,6 +962,40 @@
    acpigen_write_package_end();
 }

+static void sar_emit_dsbr(const struct dsbr_profile *dsbr, uint32_t domain)
+{
+	if (dsbr == NULL)
+		return;
+
+	/*
+	 * Name ("DSBR", Package() {
+	 * {
+	 *   Revision,
+	 *   Package()
+	 *   {
+	 *     DomainType,				// 0x7:WiFi
+	 *     BRI Resistor Value                       // in Ohm
+	 *   }
+	 } })
+	 */
+	if (dsbr->revision != DSBR_REVISION) {
+		printk(BIOS_ERR, "Unsupported DSBR table revision: %d\n",
+		       dsbr->revision);
+		return;
+	}
+
+	acpigen_write_name("DSBR");
+	acpigen_write_package(2);
+	acpigen_write_dword(dsbr->revision);
+
+	acpigen_write_package(2);
+	acpigen_write_dword(domain);
+	acpigen_write_dword(dsbr->bri_resistor_value);
+
+	acpigen_write_package_end();
+	acpigen_write_package_end();
+}
+
 static void emit_wifi_sar_acpi_structures(const struct device *dev,
    				  union wifi_sar_limits *sar_limits)
 {
@@ -979,6 +1013,7 @@
    sar_emit_wtas(sar_limits->wtas);
    sar_emit_wbem(sar_limits->wbem);
    sar_emit_wpfc(sar_limits->wpfc);
+	sar_emit_dsbr(sar_limits->dsbr, DOMAIN_TYPE_WIFI);
 }

static void wifi_ssdt_write_device(const struct device *dev, const char *path)
@@ -1102,6 +1137,7 @@
    		sar_emit_bucs(sar_limits.bucs);
    		sar_emit_bdmm(sar_limits.bdmm);
    		sar_emit_ebrd(sar_limits.ebrd);
+			sar_emit_dsbr(sar_limits.dsbr, DOMAIN_TYPE_BLUETOOTH);
    		acpigen_write_scope_end();
    	} else {
    		printk(BIOS_ERR, "Failed to get %s Bluetooth companion ACPI path\n",
diff --git a/src/include/sar.h b/src/include/sar.h
index fc8954f..b2b4647 100644
--- a/src/include/sar.h
+++ b/src/include/sar.h
@@ -9,7 +9,7 @@
 #define MAX_DENYLIST_ENTRY	16
 #define MAX_DSAR_SET_COUNT	3
 #define MAX_GEO_OFFSET_REVISION	3
-#define MAX_PROFILE_COUNT	15
+#define MAX_PROFILE_COUNT	16
 #define MAX_SAR_REVISION	2
 #define BSAR_REVISION		1
 #define WBEM_REVISION		0
@@ -21,6 +21,7 @@
 #define BDMM_REVISION		1
 #define EBRD_REVISION		1
 #define WPFC_REVISION		0
+#define DSBR_REVISION		0
 #define REVISION_SIZE		1
 #define SAR_REV0_CHAINS_COUNT	2
 #define SAR_REV0_SUBBANDS_COUNT	5
@@ -155,6 +156,11 @@
    uint8_t filter_cfg_chain_d;
 } __packed;

+struct dsbr_profile {
+	uint8_t revision;
+	uint32_t bri_resistor_value;
+} __packed;
+
 struct sar_header {
    char marker[SAR_STR_PREFIX_SIZE];
    uint8_t version;
@@ -179,6 +185,7 @@
    	struct bdmm_profile *bdmm;
    	struct ebrd_profile *ebrd;
    	struct wpfc_profile *wpfc;
+		struct dsbr_profile *dsbr;
    };
    void *profile[MAX_PROFILE_COUNT];
 };
diff --git a/src/vendorcode/google/chromeos/sar.c b/src/vendorcode/google/chromeos/sar.c
index 91c21ca..7437c3c 100644
--- a/src/vendorcode/google/chromeos/sar.c
+++ b/src/vendorcode/google/chromeos/sar.c
@@ -174,6 +174,14 @@
    return sizeof(struct wpfc_profile);
 }

+static int dsbr_table_size(const struct dsbr_profile *dsbr)
+{
+	if (dsbr == NULL)
+		return 0;
+
+	return sizeof(struct dsbr_profile);
+}
+
 static bool valid_legacy_length(size_t bin_len)
 {
    if (bin_len == LEGACY_SAR_WGDS_BIN_SIZE)
@@ -235,6 +243,7 @@
    expected_sar_bin_size += bdmm_table_size(sar_limits->bdmm);
    expected_sar_bin_size += ebrd_table_size(sar_limits->ebrd);
    expected_sar_bin_size += wpfc_table_size(sar_limits->wpfc);
+	expected_sar_bin_size += dsbr_table_size(sar_limits->dsbr);

if (sar_bin_size != expected_sar_bin_size) {
    	printk(BIOS_ERR, "Invalid SAR size, expected: %zu, obtained: %zu\n",