Change in coreboot[master]: soc/intel/../thermal: Use `clrsetbits32` API for setting LTT - coreboot-gerrit

16 Nov 2021


      Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59310 )
Change subject: soc/intel/../thermal: Use `clrsetbits32` API for setting LTT
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/thermal/thermal.c:
https://review.coreboot.org/c/coreboot/+/59310/comment/5511e9fc_963db7f0 
PS3, Line 67: ~
...
the `~` is already in the `clrsetbits32` macro, so I think you do not actually want the tilde here,  […]
ahh, make sense :)
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I51fea7bd2146ea29ef476218c006f7350b32c006
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