Change in coreboot[master]: mb/intel/tglrvp: add Tiger Lake memory initialization support - coreboot-gerrit

19 Feb 2020


      Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38998 )
Change subject: mb/intel/tglrvp: add Tiger Lake memory initialization support
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Patch Set 4: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7248862efd1dcd5a0df0e17d39b44c168caa200e
Gerrit-Change-Number: 38998
Gerrit-PatchSet: 4
Gerrit-Owner: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Martin Roth martinroth@google.com
Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Raj Astekar raj.astekar@intel.com
Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com
Gerrit-Reviewer: Shaunak Saha shaunak.saha@intel.com
Gerrit-Reviewer: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com
Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com
Gerrit-Comment-Date: Wed, 19 Feb 2020 21:41:52 +0000
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