Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38305 )
Change subject: sb/intel/common: Rename smbus_base to base ......................................................................
sb/intel/common: Rename smbus_base to base
Change-Id: I163c82270d2360fea6c11d9270aad6dddc02e68c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/southbridge/intel/common/smbus.c 1 file changed, 26 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/38305/1
diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index 1b005d7..f294f31 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -333,54 +333,54 @@ return bytes; }
-int do_smbus_read_byte(uintptr_t smbus_base, u8 device, u8 address) +int do_smbus_read_byte(uintptr_t base, u8 device, u8 address) { - return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address); + return smbus_read_cmd(base, I801_BYTE_DATA, device, address); }
-int do_smbus_read_word(uintptr_t smbus_base, u8 device, u8 address) +int do_smbus_read_word(uintptr_t base, u8 device, u8 address) { - return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address); + return smbus_read_cmd(base, I801_WORD_DATA, device, address); }
-int do_smbus_write_byte(uintptr_t smbus_base, u8 device, u8 address, u8 data) +int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data) { - return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data); + return smbus_write_cmd(base, I801_BYTE_DATA, device, address, data); }
-int do_smbus_write_word(uintptr_t smbus_base, u8 device, u8 address, u16 data) +int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data) { - return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data); + return smbus_write_cmd(base, I801_WORD_DATA, device, address, data); }
-int do_smbus_block_read(uintptr_t smbus_base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) +int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) { int ret, slave_bytes;
max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes);
/* Set up for a block data read. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_READ(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_READ(device)); if (ret < 0) return ret;
/* Set the command/address... */ - host_outb(smbus_base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTCMD, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, max_bytes, BLOCK_READ); + ret = block_cmd_loop(base, buf, max_bytes, BLOCK_READ); if (ret < 0) return ret;
/* Post-check we received complete message. */ - slave_bytes = host_inb(smbus_base, SMBHSTDAT0); + slave_bytes = host_inb(base, SMBHSTDAT0); if (ret < slave_bytes) return SMBUS_ERROR;
return ret; }
-int do_smbus_block_write(uintptr_t smbus_base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) +int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) { int ret;
@@ -388,15 +388,15 @@ return SMBUS_ERROR;
/* Set up for a block data write. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
/* Set the command/address... */ - host_outb(smbus_base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTCMD, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, (u8 *)buf, bytes, BLOCK_WRITE); + ret = block_cmd_loop(base, (u8 *)buf, bytes, BLOCK_WRITE); if (ret < 0) return ret;
@@ -415,7 +415,7 @@ return 1; }
-int do_i2c_eeprom_read(uintptr_t smbus_base, u8 device, u8 offset, const size_t bytes, u8 *buf) +int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, const size_t bytes, u8 *buf) { int ret;
@@ -428,16 +428,16 @@ * some revision of PCH. Presumably hardware revisions that * do not have i2c block write support internally set LSB. */ - ret = setup_command(smbus_base, I801_I2C_BLOCK_DATA, + ret = setup_command(base, I801_I2C_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
/* device offset */ - host_outb(smbus_base, SMBHSTDAT1, offset); + host_outb(base, SMBHSTDAT1, offset);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_READ | BLOCK_I2C); + ret = block_cmd_loop(base, buf, bytes, BLOCK_READ | BLOCK_I2C); if (ret < 0) return ret;
@@ -452,7 +452,7 @@ * The caller is responsible of settings HOSTC I2C_EN bit prior to making this * call! */ -int do_i2c_block_write(uintptr_t smbus_base, u8 device, size_t bytes, u8 *buf) +int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf) { u8 cmd; int ret; @@ -464,7 +464,7 @@ return SMBUS_ERROR;
/* Set up for a block data write. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
@@ -476,11 +476,11 @@ */ cmd = *buf++; bytes--; - host_outb(smbus_base, SMBHSTCMD, cmd); - host_outb(smbus_base, SMBHSTDAT1, cmd); + host_outb(base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTDAT1, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_WRITE); + ret = block_cmd_loop(base, buf, bytes, BLOCK_WRITE); if (ret < 0) return ret;
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38305 )
Change subject: sb/intel/common: Rename smbus_base to base ......................................................................
Patch Set 1: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38305 )
Change subject: sb/intel/common: Rename smbus_base to base ......................................................................
sb/intel/common: Rename smbus_base to base
Change-Id: I163c82270d2360fea6c11d9270aad6dddc02e68c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38305 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/common/smbus.c 1 file changed, 26 insertions(+), 26 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index 1b005d7..f294f31 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -333,54 +333,54 @@ return bytes; }
-int do_smbus_read_byte(uintptr_t smbus_base, u8 device, u8 address) +int do_smbus_read_byte(uintptr_t base, u8 device, u8 address) { - return smbus_read_cmd(smbus_base, I801_BYTE_DATA, device, address); + return smbus_read_cmd(base, I801_BYTE_DATA, device, address); }
-int do_smbus_read_word(uintptr_t smbus_base, u8 device, u8 address) +int do_smbus_read_word(uintptr_t base, u8 device, u8 address) { - return smbus_read_cmd(smbus_base, I801_WORD_DATA, device, address); + return smbus_read_cmd(base, I801_WORD_DATA, device, address); }
-int do_smbus_write_byte(uintptr_t smbus_base, u8 device, u8 address, u8 data) +int do_smbus_write_byte(uintptr_t base, u8 device, u8 address, u8 data) { - return smbus_write_cmd(smbus_base, I801_BYTE_DATA, device, address, data); + return smbus_write_cmd(base, I801_BYTE_DATA, device, address, data); }
-int do_smbus_write_word(uintptr_t smbus_base, u8 device, u8 address, u16 data) +int do_smbus_write_word(uintptr_t base, u8 device, u8 address, u16 data) { - return smbus_write_cmd(smbus_base, I801_WORD_DATA, device, address, data); + return smbus_write_cmd(base, I801_WORD_DATA, device, address, data); }
-int do_smbus_block_read(uintptr_t smbus_base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) +int do_smbus_block_read(uintptr_t base, u8 device, u8 cmd, size_t max_bytes, u8 *buf) { int ret, slave_bytes;
max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes);
/* Set up for a block data read. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_READ(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_READ(device)); if (ret < 0) return ret;
/* Set the command/address... */ - host_outb(smbus_base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTCMD, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, max_bytes, BLOCK_READ); + ret = block_cmd_loop(base, buf, max_bytes, BLOCK_READ); if (ret < 0) return ret;
/* Post-check we received complete message. */ - slave_bytes = host_inb(smbus_base, SMBHSTDAT0); + slave_bytes = host_inb(base, SMBHSTDAT0); if (ret < slave_bytes) return SMBUS_ERROR;
return ret; }
-int do_smbus_block_write(uintptr_t smbus_base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) +int do_smbus_block_write(uintptr_t base, u8 device, u8 cmd, const size_t bytes, const u8 *buf) { int ret;
@@ -388,15 +388,15 @@ return SMBUS_ERROR;
/* Set up for a block data write. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
/* Set the command/address... */ - host_outb(smbus_base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTCMD, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, (u8 *)buf, bytes, BLOCK_WRITE); + ret = block_cmd_loop(base, (u8 *)buf, bytes, BLOCK_WRITE); if (ret < 0) return ret;
@@ -415,7 +415,7 @@ return 1; }
-int do_i2c_eeprom_read(uintptr_t smbus_base, u8 device, u8 offset, const size_t bytes, u8 *buf) +int do_i2c_eeprom_read(uintptr_t base, u8 device, u8 offset, const size_t bytes, u8 *buf) { int ret;
@@ -428,16 +428,16 @@ * some revision of PCH. Presumably hardware revisions that * do not have i2c block write support internally set LSB. */ - ret = setup_command(smbus_base, I801_I2C_BLOCK_DATA, + ret = setup_command(base, I801_I2C_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
/* device offset */ - host_outb(smbus_base, SMBHSTDAT1, offset); + host_outb(base, SMBHSTDAT1, offset);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_READ | BLOCK_I2C); + ret = block_cmd_loop(base, buf, bytes, BLOCK_READ | BLOCK_I2C); if (ret < 0) return ret;
@@ -452,7 +452,7 @@ * The caller is responsible of settings HOSTC I2C_EN bit prior to making this * call! */ -int do_i2c_block_write(uintptr_t smbus_base, u8 device, size_t bytes, u8 *buf) +int do_i2c_block_write(uintptr_t base, u8 device, size_t bytes, u8 *buf) { u8 cmd; int ret; @@ -464,7 +464,7 @@ return SMBUS_ERROR;
/* Set up for a block data write. */ - ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); + ret = setup_command(base, I801_BLOCK_DATA, XMIT_WRITE(device)); if (ret < 0) return ret;
@@ -476,11 +476,11 @@ */ cmd = *buf++; bytes--; - host_outb(smbus_base, SMBHSTCMD, cmd); - host_outb(smbus_base, SMBHSTDAT1, cmd); + host_outb(base, SMBHSTCMD, cmd); + host_outb(base, SMBHSTDAT1, cmd);
/* Execute block transaction. */ - ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_WRITE); + ret = block_cmd_loop(base, buf, bytes, BLOCK_WRITE); if (ret < 0) return ret;
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38305 )
Change subject: sb/intel/common: Rename smbus_base to base ......................................................................
Patch Set 2:
Uhh.. sorry. This change was split and/or requested from parent commit and I forgot to check for the 24hour rule.