[L] Change in coreboot[master]: mb/ibm: Add IBM SBP1

[Patrick Rudolph (Code Review)]

Attention is currently required from: Paul Menzel, David Hendricks, Shuo Liu, Arthur Heymans, Nill Ge.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73392 )

Change subject: mb/ibm: Add IBM SBP1
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Patch Set 9:

(4 comments)

File src/mainboard/ibm/sbp1/Kconfig:

https://review.coreboot.org/c/coreboot/+/73392/comment/f87f716f_9a0a5cbf 
PS8, Line 14: select DEFAULT_X2APIC
> Should be set at SOC level?

Moved to soc level

https://review.coreboot.org/c/coreboot/+/73392/comment/bffae92a_8bf22f16 
PS8, Line 40: config DEBUG_SMI
            : 	default y
> Why?

removed

File src/mainboard/ibm/sbp1/romstage.c:

https://review.coreboot.org/c/coreboot/+/73392/comment/4d4b6dda_c508e493 
PS8, Line 320: mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
> Same at soc level.

Done

https://review.coreboot.org/c/coreboot/+/73392/comment/4f384ede_042e8676 
PS8, Line 325: /* Set Attempt Fast Boot to enable. */
             : 	/* Enable - Portions of memory reference code will be skipped */
             : 	/* when possible to increase boot speed on warm boots.*/
             : 	/* Disable - Disables this feature. */
             : 	/* Auto - Sets it to the MRC default setting. */
             : 	mupd->FspmConfig.AttemptFastBoot = 0x1;
             : 
             : 	/* Set Attempt Fast Cold Boot to enable. */
             : 	/* Enable - Portions of memory reference code will be skipped */
             : 	/* when possible to increase boot speed on cold boots. */
             : 	/* Disable - Disables this feature. */
             : 	/* Auto - Sets it to the MRC default setting. */
             : 	mupd->FspmConfig.AttemptFastBootCold = 0x1;
> Same settings are set at soc level.

Done