Attention is currently required from: Boris Mittelberg, Gwendal Grignou, Kapil Porwal.
Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85603?usp=email )
Change subject: ec/google/chromeec: Publish LPC GMR address range via CREC _CRS
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Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85603/comment/757570a4_1970fae3?usp... :
PS2, Line 17:
Could you please add ACPI code with and without this CL?
the DSDT entry is almost similar what I have added in this cros_ec.asl file hence, I have added more meaningful information about how OS is using this newly exposed range.
I hope this information is useful.
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