[XL] Change in coreboot[master]: ec/clevo/it5570e: add driver for EC used on various Clevo laptops

[Angel Pons (Code Review)]

Attention is currently required from: Felix Singer, Michał Żygowski, Tim Wawrzynczak, Michał Kopeć, Arthur Heymans, Michael Niewöhner.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68791 )

Change subject: ec/clevo/it5570e: add driver for EC used on various Clevo laptops
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Patch Set 12:

(4 comments)

File src/ec/clevo/it5570e/acpi/ec_queries.asl:

https://review.coreboot.org/c/coreboot/+/68791/comment/82d5b72e_8115f65b 
PS4, Line 199: // L140MU only
> currently it's unknown what it does and when, so it's there for documentation only for now

Ack

File src/ec/clevo/it5570e/i2ec.h:

https://review.coreboot.org/c/coreboot/+/68791/comment/594e960b_834bf55e 
PS4, Line 10: #define D2ADR		0x2e
> this is *not* the superio port but ITE specific "level-2 interface" behind the superio port. […]

Ah, thanks for the explanation. Would be good to clarify this

File src/ec/clevo/it5570e/i2ec.c:

https://review.coreboot.org/c/coreboot/+/68791/comment/a5feb566_6a115a69 
PS4, Line 11: 0x2e
> which ones? this is the superio port. D2ADR is not. […]

OK, so it's not the same thing. It would be best to use the PNP infrastructure, see `<device/pnp_ops.h>`.

Also, there's three layers of abstractions: SIO port pair ---> D2ADR/D2DAT ---> I2EC ADDR/DATA registers ---> the actual data. Let's add some helper functions to make this a bit clearer:

```
uint8_t sio_d2_read(pnp_devfn_t dev, uint8_t addr)
{
    pnp_write_config(dev, D2ADR, addr);
    return pnp_read_config(dev, D2DAT);
}

void sio_d2_write(pnp_devfn_t dev, uint8_t addr, uint8_t val)
{
    pnp_write_config(dev, D2ADR, addr);
    pnp_write_config(dev, D2DAT, val);
}

uint8_t ec_d2i2ec_read(pnp_devfn_t dev, uint16_t addr)
{
    sio_d2_write(dev, I2EC_ADDR_H, addr >> 4 & 0xff);
    sio_d2_write(dev, I2EC_ADDR_L, addr >> 0 & 0xff);
    return sio_d2_read(dev, I2EC_DATA);
}

void ec_d2i2ec_write(uint16_t addr, uint8_t val)
{
    sio_d2_write(dev, I2EC_ADDR_H, addr >> 4 & 0xff);
    sio_d2_write(dev, I2EC_ADDR_L, addr >> 0 & 0xff);
    sio_d2_write(dev, I2EC_DATA, val);
}
```

File src/ec/clevo/it5570e/i2ec.c:

https://review.coreboot.org/c/coreboot/+/68791/comment/4e62a8e3_1520df78 
PS12, Line 17: I2EC_ADDR_H
"Writing" (won't work because `outb(value, port)` arguments are backwards) 2 times to the same register? Is this correct?