Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu.
Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85439?usp=email )
Change subject: soc/intel/xeon_sp/cpx: Fix register lock
......................................................................
Patch Set 3:
(1 comment)
File src/soc/intel/xeon_sp/cpx/cpu.c:
https://review.coreboot.org/c/coreboot/+/85439/comment/5d04ff52_f88607d3?usp... :
PS2, Line 118: /* The MSRs and CSRS have the same register layout. Use the CSRS bit definitions
Comment is no longer true
Done
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