[M] Change in coreboot[master]: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal.

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69680 )

Change subject: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/69680/comment/8a0b8250_602c4f62 
PS2, Line 10: 
            : The learning being made from Alder Lake platform showed that the CSE
            : EOP cmd response time is highly nondeterministic and letting the EOP
            : cmd issued by FSP makes the response time even worse.
            : 
            : The idea being pursued during Alder Lake platform is to let FSP skip sending the EOP cmd and coreboot sends it at the last minute
            : (late sending of EOP) to ensure there is ample time for CSE to come
            : to a state where the response to the EOP is almost immediate.
> > > Thanks for commit update. […]
>
> This is to ensure FSP can skip setting D0i3 bit for CSE and coreboot is able to sent EOP and put the HECI devices into the D0i3

The message seems to be apt for the current CL.
> Can you please elaborate how the EOP cmd receiving arch is different between ADL and MTL?

My comment is based on the issue you indicated in the CL's commit message. It seems the current commit message is not relevant directly.