Attention is currently required from: Sean Rhodes, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62990 )
Change subject: drivers/smmstore: Enable 4KiB blocks in SMMSTORE ......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
fix the payload
Pandora's box, first thing they'll ask is why 64KiB - we dont want people to configure it wrong is a weak argument.
Having options to configure things is ok. Having options to configure things potentially incorrectly should be avoided.
A Kconfig to work around the failings of a specific payload makes using coreboot even more complicated than it already is. You'd need to understand a whole lot of things to be able to make a decision whether 4K or 64K block erase in SMMSTORE is a good idea for your payload. Your then essentially pushing responsibility from developer to users and we try to avoid that.
Plus you've got to get past Patrick first :p
Can you not just top align the COREBOOT region in fmap and BIOS region in IFD to work around this?
I can not, I have tried and failed - to the point of thinking it's impossible. I'd happily be proved wrong.
The Intel tooling does not seem to allow for that indeed. (it looks pretty bad in general ^^)
Have you tried the following using native coreboot tools to edit the layout?
$ util/ifdtool/ifdtool build/coreboot.bin -f /tmp/layout -p aplk -> modify /tmp/layout so that BIOS region end is 64K aligned $ util/ifdtool/ifdtool build/coreboot.bin -n /tmp/layout -p aplk -> Now you have a worthless image but with a good ifd. extract it $ util/ifdtool/ifdtool build/coreboot.bin -x -> use that new IFD & adapt fmap and rebuild.
Totally untested btw, just a suggestion.