Attention is currently required from: Paul Menzel.
Ana Carolina Cabral has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/86084?usp=email )
Change subject: mb/amd/birman_plus/ec: Rectify ECRAM register bits ......................................................................
Patch Set 16:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86084/comment/f0cabb47_82645f3a?usp... : PS15, Line 9: registers
register
Done
https://review.coreboot.org/c/coreboot/+/86084/comment/e815eaa6_1888721a?usp... : PS15, Line 14:
Were you able to test this?
It boots successfully on the board, how can I investigate any further?
File src/mainboard/amd/birman_plus/ec.c:
https://review.coreboot.org/c/coreboot/+/86084/comment/ce5ac93d_a0d6e4a9?usp... : PS13, Line 33: #define EC_GPIO_7_ADDR 0xA7
PI doesn't use A7[6] anywhere..
Acknowledged
https://review.coreboot.org/c/coreboot/+/86084/comment/be5fc52a_bcb1c096?usp... : PS13, Line 38: #define EC_GPIO_8_ADDR 0xA8
is it intended that this register isn't written to?
Done
https://review.coreboot.org/c/coreboot/+/86084/comment/98d7da3f_cbb0407d?usp... : PS13, Line 79: #define EC_GPIO_F_ADDR 0xAF
i wonder if we'll need some of the other bits in this register too or does the EC drive those by its […]
The reference code only uses the other bits in the device power table, what should I do in this case?
File src/mainboard/amd/birman_plus/ec.c:
https://review.coreboot.org/c/coreboot/+/86084/comment/f9364f48_585a9687?usp... : PS15, Line 161: ECE_LOM_PWR_EN
use `if (CONFIG(ENABLE_GBE_BIRMANPLUS))` to set/clear `ECE_LOM_PWR_EN`
Done