Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59480 )
Change subject: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs ......................................................................
mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs
Enable Acoustic noise mitigation for bugzzy and set slew rate to 1/8 which is calibrated value for the board.
BUG=b:207046230 BRANCH=dedede TEST=build firmware to UPD and Acoustic noise test
Signed-off-by: Seunghwan Kim sh_.kim@samsung.corp-partner.google.com Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59480 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb index e1318a8..de1e46d 100644 --- a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb +++ b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb @@ -2,6 +2,12 @@ # MIPI display panel register "DdiPortAConfig" = "2" # DdiPortMipiDsi
+ # Enable Acoustic noise mitigation and set slew rate to 1/8 + # Rest of the parameters are 0 by default. + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate" = "SlewRateFastBy8" + register "FastPkgCRampDisable" = "1" + # Disable PCIe Root Port 8 (index 7) register "PcieRpEnable[7]" = "0" # Disable PCIe Clock Source 4 (index 3)